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authorArnd Bergmann <arnd@arndb.de>2012-02-22 09:20:07 -0500
committerArnd Bergmann <arnd@arndb.de>2012-02-22 09:20:18 -0500
commit2daa79ec2126f8e710391e9d8e8f0d31d7c91d5f (patch)
treeab89c74c09c2986fa01c25ad8e45989a48a18899 /drivers/gpu/drm/i915/intel_dp.c
parent7dae8c5209147ad06d424928a5f1ec45caa87691 (diff)
parent678a0222edc9da43a22145d68647500ee85e6c04 (diff)
Merge branch 'lpc32xx/drivers' into next/drivers
* lpc32xx/drivers: (566 commits) ARM: LPC32xx: ADC support for mach-lpc32xx Includes an update to Linux 3.3-rc4 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c20
1 files changed, 5 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index db3b461ad412..94f860cce3f7 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -208,17 +208,8 @@ intel_dp_link_clock(uint8_t link_bw)
208 */ 208 */
209 209
210static int 210static int
211intel_dp_link_required(struct intel_dp *intel_dp, int pixel_clock, int check_bpp) 211intel_dp_link_required(int pixel_clock, int bpp)
212{ 212{
213 struct drm_crtc *crtc = intel_dp->base.base.crtc;
214 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
215 int bpp = 24;
216
217 if (check_bpp)
218 bpp = check_bpp;
219 else if (intel_crtc)
220 bpp = intel_crtc->bpp;
221
222 return (pixel_clock * bpp + 9) / 10; 213 return (pixel_clock * bpp + 9) / 10;
223} 214}
224 215
@@ -245,12 +236,11 @@ intel_dp_mode_valid(struct drm_connector *connector,
245 return MODE_PANEL; 236 return MODE_PANEL;
246 } 237 }
247 238
248 mode_rate = intel_dp_link_required(intel_dp, mode->clock, 0); 239 mode_rate = intel_dp_link_required(mode->clock, 24);
249 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); 240 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
250 241
251 if (mode_rate > max_rate) { 242 if (mode_rate > max_rate) {
252 mode_rate = intel_dp_link_required(intel_dp, 243 mode_rate = intel_dp_link_required(mode->clock, 18);
253 mode->clock, 18);
254 if (mode_rate > max_rate) 244 if (mode_rate > max_rate)
255 return MODE_CLOCK_HIGH; 245 return MODE_CLOCK_HIGH;
256 else 246 else
@@ -683,7 +673,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
683 int lane_count, clock; 673 int lane_count, clock;
684 int max_lane_count = intel_dp_max_lane_count(intel_dp); 674 int max_lane_count = intel_dp_max_lane_count(intel_dp);
685 int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; 675 int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;
686 int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 0; 676 int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
687 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; 677 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
688 678
689 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { 679 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) {
@@ -701,7 +691,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
701 for (clock = 0; clock <= max_clock; clock++) { 691 for (clock = 0; clock <= max_clock; clock++) {
702 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); 692 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
703 693
704 if (intel_dp_link_required(intel_dp, mode->clock, bpp) 694 if (intel_dp_link_required(mode->clock, bpp)
705 <= link_avail) { 695 <= link_avail) {
706 intel_dp->link_bw = bws[clock]; 696 intel_dp->link_bw = bws[clock];
707 intel_dp->lane_count = lane_count; 697 intel_dp->lane_count = lane_count;