diff options
author | Yuanhan Liu <yuanhan.liu@linux.intel.com> | 2010-12-15 02:42:32 -0500 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-15 06:22:27 -0500 |
commit | 9c04f015ebc2cc2cca5a4a576deb82a311578edc (patch) | |
tree | 9c4b04dc9a07c943c431ce60d45113a1cd78d442 /drivers/gpu/drm/i915/intel_display.c | |
parent | 1398261a2e84c537c409259cfe9db3d0abcd9f99 (diff) |
drm/i915: Add frame buffer compression on Sandybridge
Add frame buffer compression on Sandybridge. The method is similar to
Ironlake, except that two new registers of type GTTMMADR must be written
with the right fence info.
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index eaf2bc6b537d..8645a974a499 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1262,6 +1262,12 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1262 | /* enable it... */ | 1262 | /* enable it... */ |
1263 | I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); | 1263 | I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); |
1264 | 1264 | ||
1265 | if (IS_GEN6(dev)) { | ||
1266 | I915_WRITE(SNB_DPFC_CTL_SA, | ||
1267 | SNB_CPU_FENCE_ENABLE | dev_priv->cfb_fence); | ||
1268 | I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y); | ||
1269 | } | ||
1270 | |||
1265 | DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); | 1271 | DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); |
1266 | } | 1272 | } |
1267 | 1273 | ||
@@ -6395,7 +6401,7 @@ static void intel_init_display(struct drm_device *dev) | |||
6395 | dev_priv->display.dpms = i9xx_crtc_dpms; | 6401 | dev_priv->display.dpms = i9xx_crtc_dpms; |
6396 | 6402 | ||
6397 | if (I915_HAS_FBC(dev)) { | 6403 | if (I915_HAS_FBC(dev)) { |
6398 | if (IS_IRONLAKE_M(dev)) { | 6404 | if (HAS_PCH_SPLIT(dev)) { |
6399 | dev_priv->display.fbc_enabled = ironlake_fbc_enabled; | 6405 | dev_priv->display.fbc_enabled = ironlake_fbc_enabled; |
6400 | dev_priv->display.enable_fbc = ironlake_enable_fbc; | 6406 | dev_priv->display.enable_fbc = ironlake_enable_fbc; |
6401 | dev_priv->display.disable_fbc = ironlake_disable_fbc; | 6407 | dev_priv->display.disable_fbc = ironlake_disable_fbc; |