Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel

* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:
  drm/i915: fix up error path leak in i915_cmdbuffer
  drm/i915: fix unpaired i915 device mutex on entervt failure.
  drm/i915: add support for G41 chipset
  drm/i915: Enable ASLE if present
  drm/i915: Unregister ACPI video driver when exiting
  drm/i915: Register ACPI video even when not modesetting
  drm/i915: fix transition to I915_TILING_NONE
  drm/i915: Don't let an oops get triggered from irq_emit without dma init.
  drm/i915: allow tiled front buffers on 965+

1 files changed, 9 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c2c8e95ff14d..bdcda36953b0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -657,6 +657,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
         int dspbase = (pipe == 0 ? DSPAADDR : DSPBADDR);
         int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
         int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;
+        int dsptileoff = (pipe == 0 ? DSPATILEOFF : DSPBTILEOFF);
         int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;
         u32 dspcntr, alignment;
         int ret;
@@ -733,6 +734,13 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
                 mutex_unlock(&dev->struct_mutex);
                 return -EINVAL;
         }
+        if (IS_I965G(dev)) {
+                if (obj_priv->tiling_mode != I915_TILING_NONE)
+                        dspcntr |= DISPPLANE_TILED;
+                else
+                        dspcntr &= ~DISPPLANE_TILED;
+        }
+
         I915_WRITE(dspcntr_reg, dspcntr);
 
         Start = obj_priv->gtt_offset;
@@ -745,6 +753,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
                 I915_READ(dspbase);
                 I915_WRITE(dspsurf, Start);
                 I915_READ(dspsurf);
+                I915_WRITE(dsptileoff, (y << 16) | x);
         } else {
                 I915_WRITE(dspbase, Start + Offset);
                 I915_READ(dspbase);