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authorVille Syrjälä <ville.syrjala@linux.intel.com>2013-10-01 11:02:19 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-10 06:47:03 -0400
commitd1de00efcb4992da3936a4b0300b8b9b244080cd (patch)
treecf2f44addce9650dcc709c1ba5d738ab32d6fdb7 /drivers/gpu/drm/i915/intel_display.c
parent1dba99f495fb2b8712d83f53a769a7393ea127d3 (diff)
drm/i915: Rename intel_{enable, disable}_plane to intel_{enable, disable}_primary_plane
The new names make it clearer which plane we're talking about. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Resolve small conflict with the haswell_crtc_disable_planes extraction.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 985c389e14ef..a2acf79c365d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1822,15 +1822,15 @@ void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
1822} 1822}
1823 1823
1824/** 1824/**
1825 * intel_enable_plane - enable a display plane on a given pipe 1825 * intel_enable_primary_plane - enable the primary plane on a given pipe
1826 * @dev_priv: i915 private structure 1826 * @dev_priv: i915 private structure
1827 * @plane: plane to enable 1827 * @plane: plane to enable
1828 * @pipe: pipe being fed 1828 * @pipe: pipe being fed
1829 * 1829 *
1830 * Enable @plane on @pipe, making sure that @pipe is running first. 1830 * Enable @plane on @pipe, making sure that @pipe is running first.
1831 */ 1831 */
1832static void intel_enable_plane(struct drm_i915_private *dev_priv, 1832static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
1833 enum plane plane, enum pipe pipe) 1833 enum plane plane, enum pipe pipe)
1834{ 1834{
1835 struct intel_crtc *intel_crtc = 1835 struct intel_crtc *intel_crtc =
1836 to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); 1836 to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
@@ -1853,15 +1853,15 @@ static void intel_enable_plane(struct drm_i915_private *dev_priv,
1853} 1853}
1854 1854
1855/** 1855/**
1856 * intel_disable_plane - disable a display plane 1856 * intel_disable_primary_plane - disable the primary plane
1857 * @dev_priv: i915 private structure 1857 * @dev_priv: i915 private structure
1858 * @plane: plane to disable 1858 * @plane: plane to disable
1859 * @pipe: pipe consuming the data 1859 * @pipe: pipe consuming the data
1860 * 1860 *
1861 * Disable @plane; should be an independent operation. 1861 * Disable @plane; should be an independent operation.
1862 */ 1862 */
1863static void intel_disable_plane(struct drm_i915_private *dev_priv, 1863static void intel_disable_primary_plane(struct drm_i915_private *dev_priv,
1864 enum plane plane, enum pipe pipe) 1864 enum plane plane, enum pipe pipe)
1865{ 1865{
1866 struct intel_crtc *intel_crtc = 1866 struct intel_crtc *intel_crtc =
1867 to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); 1867 to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
@@ -3451,7 +3451,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
3451 intel_update_watermarks(crtc); 3451 intel_update_watermarks(crtc);
3452 intel_enable_pipe(dev_priv, pipe, 3452 intel_enable_pipe(dev_priv, pipe,
3453 intel_crtc->config.has_pch_encoder, false); 3453 intel_crtc->config.has_pch_encoder, false);
3454 intel_enable_plane(dev_priv, plane, pipe); 3454 intel_enable_primary_plane(dev_priv, plane, pipe);
3455 intel_enable_planes(crtc); 3455 intel_enable_planes(crtc);
3456 intel_crtc_update_cursor(crtc, true); 3456 intel_crtc_update_cursor(crtc, true);
3457 3457
@@ -3493,7 +3493,7 @@ static void haswell_crtc_enable_planes(struct drm_crtc *crtc)
3493 int pipe = intel_crtc->pipe; 3493 int pipe = intel_crtc->pipe;
3494 int plane = intel_crtc->plane; 3494 int plane = intel_crtc->plane;
3495 3495
3496 intel_enable_plane(dev_priv, plane, pipe); 3496 intel_enable_primary_plane(dev_priv, plane, pipe);
3497 intel_enable_planes(crtc); 3497 intel_enable_planes(crtc);
3498 intel_crtc_update_cursor(crtc, true); 3498 intel_crtc_update_cursor(crtc, true);
3499 3499
@@ -3523,7 +3523,7 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc)
3523 3523
3524 intel_crtc_update_cursor(crtc, false); 3524 intel_crtc_update_cursor(crtc, false);
3525 intel_disable_planes(crtc); 3525 intel_disable_planes(crtc);
3526 intel_disable_plane(dev_priv, plane, pipe); 3526 intel_disable_primary_plane(dev_priv, plane, pipe);
3527} 3527}
3528 3528
3529/* 3529/*
@@ -3662,7 +3662,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
3662 3662
3663 intel_crtc_update_cursor(crtc, false); 3663 intel_crtc_update_cursor(crtc, false);
3664 intel_disable_planes(crtc); 3664 intel_disable_planes(crtc);
3665 intel_disable_plane(dev_priv, plane, pipe); 3665 intel_disable_primary_plane(dev_priv, plane, pipe);
3666 3666
3667 if (intel_crtc->config.has_pch_encoder) 3667 if (intel_crtc->config.has_pch_encoder)
3668 intel_set_pch_fifo_underrun_reporting(dev, pipe, false); 3668 intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
@@ -3870,7 +3870,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
3870 3870
3871 intel_update_watermarks(crtc); 3871 intel_update_watermarks(crtc);
3872 intel_enable_pipe(dev_priv, pipe, false, is_dsi); 3872 intel_enable_pipe(dev_priv, pipe, false, is_dsi);
3873 intel_enable_plane(dev_priv, plane, pipe); 3873 intel_enable_primary_plane(dev_priv, plane, pipe);
3874 intel_enable_planes(crtc); 3874 intel_enable_planes(crtc);
3875 intel_crtc_update_cursor(crtc, true); 3875 intel_crtc_update_cursor(crtc, true);
3876 3876
@@ -3908,7 +3908,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
3908 3908
3909 intel_update_watermarks(crtc); 3909 intel_update_watermarks(crtc);
3910 intel_enable_pipe(dev_priv, pipe, false, false); 3910 intel_enable_pipe(dev_priv, pipe, false, false);
3911 intel_enable_plane(dev_priv, plane, pipe); 3911 intel_enable_primary_plane(dev_priv, plane, pipe);
3912 intel_enable_planes(crtc); 3912 intel_enable_planes(crtc);
3913 /* The fixup needs to happen before cursor is enabled */ 3913 /* The fixup needs to happen before cursor is enabled */
3914 if (IS_G4X(dev)) 3914 if (IS_G4X(dev))
@@ -3964,7 +3964,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
3964 intel_crtc_dpms_overlay(intel_crtc, false); 3964 intel_crtc_dpms_overlay(intel_crtc, false);
3965 intel_crtc_update_cursor(crtc, false); 3965 intel_crtc_update_cursor(crtc, false);
3966 intel_disable_planes(crtc); 3966 intel_disable_planes(crtc);
3967 intel_disable_plane(dev_priv, plane, pipe); 3967 intel_disable_primary_plane(dev_priv, plane, pipe);
3968 3968
3969 intel_disable_pipe(dev_priv, pipe); 3969 intel_disable_pipe(dev_priv, pipe);
3970 3970