drm/i915/vlv: enable HDA display audio for Valleyview2

This patch defines HD-Audio configuration registers and enables display audio
from HDA controller for Valleyview2.

v2: fix missing offset VLV_DISPLAY_BASE
v3: rename patch from 'enable HDMI audio' to 'enable HDA display audio', since
    it's for both HDMI and DP audio
v4: use enc_to_dig_port() to get port number, instead of using Haswell specific
    function intel_ddi_get_encoder_port()

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 20 insertions, 3 deletions

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f34252d134b6..e31a740e1663 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6989,6 +6989,11 @@ static void ironlake_write_eld(struct drm_connector *connector,
                 aud_config = IBX_AUD_CFG(pipe);
                 aud_cntl_st = IBX_AUD_CNTL_ST(pipe);
                 aud_cntrl_st2 = IBX_AUD_CNTL_ST2;
+        } else if (IS_VALLEYVIEW(connector->dev)) {
+                hdmiw_hdmiedid = VLV_HDMIW_HDMIEDID(pipe);
+                aud_config = VLV_AUD_CFG(pipe);
+                aud_cntl_st = VLV_AUD_CNTL_ST(pipe);
+                aud_cntrl_st2 = VLV_AUD_CNTL_ST2;
         } else {
                 hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID(pipe);
                 aud_config = CPT_AUD_CFG(pipe);
@@ -6998,8 +7003,19 @@ static void ironlake_write_eld(struct drm_connector *connector,
 
         DRM_DEBUG_DRIVER("ELD on pipe %c\n", pipe_name(pipe));
 
-        i = I915_READ(aud_cntl_st);
-        i = (i >> 29) & DIP_PORT_SEL_MASK;              /* DIP_Port_Select, 0x1 = PortB */
+        if (IS_VALLEYVIEW(connector->dev))  {
+                struct intel_encoder *intel_encoder;
+                struct intel_digital_port *intel_dig_port;
+
+                intel_encoder = intel_attached_encoder(connector);
+                intel_dig_port = enc_to_dig_port(&intel_encoder->base);
+                i = intel_dig_port->port;
+        } else {
+                i = I915_READ(aud_cntl_st);
+                i = (i >> 29) & DIP_PORT_SEL_MASK;
+                /* DIP_Port_Select, 0x1 = PortB */
+        }
+
         if (!i) {
                 DRM_DEBUG_DRIVER("Audio directed to unknown port\n");
                 /* operate blindly on all ports */
@@ -10317,7 +10333,8 @@ static void intel_init_display(struct drm_device *dev)
                 }
         } else if (IS_G4X(dev)) {
                 dev_priv->display.write_eld = g4x_write_eld;
-        }
+        } else if (IS_VALLEYVIEW(dev))
+                dev_priv->display.write_eld = ironlake_write_eld;
 
         /* Default just returns -ENODEV to indicate unsupported */
         dev_priv->display.queue_flip = intel_default_queue_flip;