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authorThomas Richter <thor@math.tu-berlin.de>2012-07-18 13:22:30 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-07-25 12:23:48 -0400
commit7434a255a5cf42819b7e42377f18aaa02f6be52b (patch)
treedb156cc18e7c82b1769f32300dabf89cf1329d76 /drivers/gpu/drm/i915/intel_display.c
parentab9d7c302af858e1bc8f613c3a6f1eea3c4c0364 (diff)
drm/i915: Support for ns2501-DVO
This patch adds support for the ns2501 DVO, found in some older Fujitsu/Siemens Labtops. It is in the state of "works for me". Includes now proper DPMS support. Includes switching between resolutions - from 640x480 to 1024x768. Currently assumes that the native display resolution is 1024x768. The ns2501 seems to be rather critical - if the output PLL is not running, the chip doesn't seem to be clocked and then doesn't react on i2c messages. Thus, a quick'n-dirty trick ensures that the DVO is active before submitting any i2c messages to it. This is probably to be reviewed. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=17902 Signed-off-by: Thomas Richter <thor@math.tu-berlin.de> [danvet: fixup whitespace fail.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f8c2aa1ec27a..93d9934ba328 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1428,8 +1428,10 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
1428 * protect mechanism may be enabled. 1428 * protect mechanism may be enabled.
1429 * 1429 *
1430 * Note! This is for pre-ILK only. 1430 * Note! This is for pre-ILK only.
1431 *
1432 * Unfortunately needed by dvo_ns2501 since the dvo depends on it running.
1431 */ 1433 */
1432static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) 1434void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
1433{ 1435{
1434 int reg; 1436 int reg;
1435 u32 val; 1437 u32 val;