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authorJesse Barnes <jbarnes@virtuousgeek.org>2011-09-02 15:52:11 -0400
committerKeith Packard <keithp@keithp.com>2011-10-20 18:26:42 -0400
commit4c609cb890b13ef58e0c0cdd238993484e1b9b83 (patch)
tree30c4be936612d43c439339e1375f0d70dd04a392 /drivers/gpu/drm/i915/intel_display.c
parentc4f9c4c2b3f1831e932e04db992cf6fe92c2a95a (diff)
drm/i915: PLL macro cleanup and pipe assertion check
Add a macro for accessing the two pipe PLLs and add a check to make sure we don't access a non-existent one in the enable/disable functions. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 2e28c687010c..dade95ca0d86 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1172,6 +1172,9 @@ static void intel_enable_pch_pll(struct drm_i915_private *dev_priv,
1172 int reg; 1172 int reg;
1173 u32 val; 1173 u32 val;
1174 1174
1175 if (pipe > 1)
1176 return;
1177
1175 /* PCH only available on ILK+ */ 1178 /* PCH only available on ILK+ */
1176 BUG_ON(dev_priv->info->gen < 5); 1179 BUG_ON(dev_priv->info->gen < 5);
1177 1180
@@ -1192,6 +1195,9 @@ static void intel_disable_pch_pll(struct drm_i915_private *dev_priv,
1192 int reg; 1195 int reg;
1193 u32 val; 1196 u32 val;
1194 1197
1198 if (pipe > 1)
1199 return;
1200
1195 /* PCH only available on ILK+ */ 1201 /* PCH only available on ILK+ */
1196 BUG_ON(dev_priv->info->gen < 5); 1202 BUG_ON(dev_priv->info->gen < 5);
1197 1203