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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-07-23 10:19:25 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-07-24 04:37:09 -0400
commit47701c3ba26cb33ebe8a5e899ec922ab0de621a3 (patch)
treea1e377050eb9359f568b3ed558375d20cd8b4e64 /drivers/gpu/drm/i915/intel_display.c
parent2fa86a1fea14c3019b2de16ea47e1a5363c60905 (diff)
drm/i915: disable CLKOUT_DP when it's not needed
We currently don't support HDMI clock bending nor use SSC for DP or HDMI on Haswell, so the only case where we need CLKOUT_DP is for VGA. v2: - Replace the IS_ULT check for LPT-LP - Simplify GEN0/DBUFF0 check due to change on the previous patch - Also check for SBI_SSCCTL_DISABLE (Ben). Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c36
1 files changed, 32 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 22e3f341366c..26b49d8d781c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5310,6 +5310,34 @@ static void lpt_enable_clkout_dp(struct drm_device *dev, bool with_spread,
5310 mutex_unlock(&dev_priv->dpio_lock); 5310 mutex_unlock(&dev_priv->dpio_lock);
5311} 5311}
5312 5312
5313/* Sequence to disable CLKOUT_DP */
5314static void lpt_disable_clkout_dp(struct drm_device *dev)
5315{
5316 struct drm_i915_private *dev_priv = dev->dev_private;
5317 uint32_t reg, tmp;
5318
5319 mutex_lock(&dev_priv->dpio_lock);
5320
5321 reg = (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) ?
5322 SBI_GEN0 : SBI_DBUFF0;
5323 tmp = intel_sbi_read(dev_priv, reg, SBI_ICLK);
5324 tmp &= ~SBI_GEN0_CFG_BUFFENABLE_DISABLE;
5325 intel_sbi_write(dev_priv, reg, tmp, SBI_ICLK);
5326
5327 tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
5328 if (!(tmp & SBI_SSCCTL_DISABLE)) {
5329 if (!(tmp & SBI_SSCCTL_PATHALT)) {
5330 tmp |= SBI_SSCCTL_PATHALT;
5331 intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
5332 udelay(32);
5333 }
5334 tmp |= SBI_SSCCTL_DISABLE;
5335 intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
5336 }
5337
5338 mutex_unlock(&dev_priv->dpio_lock);
5339}
5340
5313static void lpt_init_pch_refclk(struct drm_device *dev) 5341static void lpt_init_pch_refclk(struct drm_device *dev)
5314{ 5342{
5315 struct drm_mode_config *mode_config = &dev->mode_config; 5343 struct drm_mode_config *mode_config = &dev->mode_config;
@@ -5324,10 +5352,10 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
5324 } 5352 }
5325 } 5353 }
5326 5354
5327 if (!has_vga) 5355 if (has_vga)
5328 return; 5356 lpt_enable_clkout_dp(dev, true, true);
5329 5357 else
5330 lpt_enable_clkout_dp(dev, true, true); 5358 lpt_disable_clkout_dp(dev);
5331} 5359}
5332 5360
5333/* 5361/*