diff options
author | Kristian Høgsberg <krh@bitplanet.net> | 2009-02-13 20:56:52 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-02-19 21:21:13 -0500 |
commit | 43565a0648e664744ac9201c199681451355edcc (patch) | |
tree | c5d5680b90aaed10e4f27b4e60e0a61cbb7d2c0c /drivers/gpu/drm/i915/intel_display.c | |
parent | a29f5ca3d691995266a4b1df313e32ff0509a03c (diff) |
drm: Use spread spectrum when the bios tells us it's ok.
Lifted from the DDX modesetting.
Signed-off-by: Kristian Høgsberg <krh@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8b2038706268..13f9b6667c94 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -217,7 +217,7 @@ bool intel_pipe_has_type (struct drm_crtc *crtc, int type) | |||
217 | return false; | 217 | return false; |
218 | } | 218 | } |
219 | 219 | ||
220 | #define INTELPllInvalid(s) { /* ErrorF (s) */; return false; } | 220 | #define INTELPllInvalid(s) do { DRM_DEBUG(s); return false; } while (0) |
221 | /** | 221 | /** |
222 | * Returns whether the given set of divisors are valid for a given refclk with | 222 | * Returns whether the given set of divisors are valid for a given refclk with |
223 | * the given connectors. | 223 | * the given connectors. |
@@ -726,7 +726,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
726 | int dspsize_reg = (pipe == 0) ? DSPASIZE : DSPBSIZE; | 726 | int dspsize_reg = (pipe == 0) ? DSPASIZE : DSPBSIZE; |
727 | int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS; | 727 | int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS; |
728 | int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC; | 728 | int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC; |
729 | int refclk; | 729 | int refclk, num_outputs = 0; |
730 | intel_clock_t clock; | 730 | intel_clock_t clock; |
731 | u32 dpll = 0, fp = 0, dspcntr, pipeconf; | 731 | u32 dpll = 0, fp = 0, dspcntr, pipeconf; |
732 | bool ok, is_sdvo = false, is_dvo = false; | 732 | bool ok, is_sdvo = false, is_dvo = false; |
@@ -763,9 +763,14 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
763 | is_crt = true; | 763 | is_crt = true; |
764 | break; | 764 | break; |
765 | } | 765 | } |
766 | |||
767 | num_outputs++; | ||
766 | } | 768 | } |
767 | 769 | ||
768 | if (IS_I9XX(dev)) { | 770 | if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) { |
771 | refclk = dev_priv->lvds_ssc_freq * 1000; | ||
772 | DRM_DEBUG("using SSC reference clock of %d MHz\n", refclk / 1000); | ||
773 | } else if (IS_I9XX(dev)) { | ||
769 | refclk = 96000; | 774 | refclk = 96000; |
770 | } else { | 775 | } else { |
771 | refclk = 48000; | 776 | refclk = 48000; |
@@ -824,11 +829,14 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
824 | } | 829 | } |
825 | } | 830 | } |
826 | 831 | ||
827 | if (is_tv) { | 832 | if (is_sdvo && is_tv) |
833 | dpll |= PLL_REF_INPUT_TVCLKINBC; | ||
834 | else if (is_tv) | ||
828 | /* XXX: just matching BIOS for now */ | 835 | /* XXX: just matching BIOS for now */ |
829 | /* dpll |= PLL_REF_INPUT_TVCLKINBC; */ | 836 | /* dpll |= PLL_REF_INPUT_TVCLKINBC; */ |
830 | dpll |= 3; | 837 | dpll |= 3; |
831 | } | 838 | else if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) |
839 | dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN; | ||
832 | else | 840 | else |
833 | dpll |= PLL_REF_INPUT_DREFCLK; | 841 | dpll |= PLL_REF_INPUT_DREFCLK; |
834 | 842 | ||