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authorGajanan Bhat <gajanan.bhat@intel.com>2012-09-27 09:43:07 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-09-28 11:04:38 -0400
commit19c03924d4b72eedff517f80edc6b33c14f0fe53 (patch)
tree8b07b8854e7d848e878c06584f94ab74854853dc /drivers/gpu/drm/i915/intel_display.c
parent2a8f64ca23447248efaf87c5c7c2cb0c5c3f27e8 (diff)
drm/i915: Add eDP support for Valleyview
Eventhough Valleyview display block is derived from Cantiga, VLV supports eDP. So, added eDP checks in i9xx_crtc_mode_set path. v2: use different DPIO_DIVISOR values for VGA, DP and eDP v3: fix DPIO value calculation to use same values for all display interfaces v4: removed unconditional enabling of 6bpc dithering based on comments from Daniel & Jani Nikula. Also changed the display enabling order to force eDP detection first. Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com> Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6458f95263d5..e9c1f3c00143 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4415,6 +4415,14 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
4415 } 4415 }
4416 } 4416 }
4417 4417
4418 if (IS_VALLEYVIEW(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) {
4419 if (adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC) {
4420 pipeconf |= PIPECONF_BPP_6 |
4421 PIPECONF_ENABLE |
4422 I965_PIPECONF_ACTIVE;
4423 }
4424 }
4425
4418 DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B'); 4426 DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');
4419 drm_mode_debug_printmodeline(mode); 4427 drm_mode_debug_printmodeline(mode);
4420 4428
@@ -7673,6 +7681,10 @@ static void intel_setup_outputs(struct drm_device *dev)
7673 } else if (IS_VALLEYVIEW(dev)) { 7681 } else if (IS_VALLEYVIEW(dev)) {
7674 int found; 7682 int found;
7675 7683
7684 /* Check for built-in panel first. Shares lanes with HDMI on SDVOC */
7685 if (I915_READ(DP_C) & DP_DETECTED)
7686 intel_dp_init(dev, DP_C, PORT_C);
7687
7676 if (I915_READ(SDVOB) & PORT_DETECTED) { 7688 if (I915_READ(SDVOB) & PORT_DETECTED) {
7677 /* SDVOB multiplex with HDMIB */ 7689 /* SDVOB multiplex with HDMIB */
7678 found = intel_sdvo_init(dev, SDVOB, true); 7690 found = intel_sdvo_init(dev, SDVOB, true);
@@ -7685,9 +7697,6 @@ static void intel_setup_outputs(struct drm_device *dev)
7685 if (I915_READ(SDVOC) & PORT_DETECTED) 7697 if (I915_READ(SDVOC) & PORT_DETECTED)
7686 intel_hdmi_init(dev, SDVOC, PORT_C); 7698 intel_hdmi_init(dev, SDVOC, PORT_C);
7687 7699
7688 /* Shares lanes with HDMI on SDVOC */
7689 if (I915_READ(DP_C) & DP_DETECTED)
7690 intel_dp_init(dev, DP_C, PORT_C);
7691 } else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) { 7700 } else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) {
7692 bool found = false; 7701 bool found = false;
7693 7702