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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-04-30 08:01:45 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-05-10 15:56:46 -0400
commit09ede5414f0215461c933032630bf9c3a61a8ba3 (patch)
tree603fe6012789c9b5dca478c33a2cc7aadc628cb6 /drivers/gpu/drm/i915/intel_display.c
parenta16af721e83466b965c7e53d5350e16abf9691e4 (diff)
drm/i915: make SDVO TV-out work for multifunction devices
We need to track this correctly. While at it shovel the boolean to track whether the sdvo is in tv mode or not into pipe_config. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36997 Tested-by: Pierre Assal <pierre.assal@verint.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=63609 Tested-by: cancan,feng <cancan.feng@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index df81f1648400..e75e54680321 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4587,7 +4587,7 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
4587 if (INTEL_INFO(dev)->gen >= 4) 4587 if (INTEL_INFO(dev)->gen >= 4)
4588 dpll |= (6 << PLL_LOAD_PULSE_PHASE_SHIFT); 4588 dpll |= (6 << PLL_LOAD_PULSE_PHASE_SHIFT);
4589 4589
4590 if (is_sdvo && intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_TVOUT)) 4590 if (crtc->config.sdvo_tv_clock)
4591 dpll |= PLL_REF_INPUT_TVCLKINBC; 4591 dpll |= PLL_REF_INPUT_TVCLKINBC;
4592 else if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS) && 4592 else if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS) &&
4593 intel_panel_use_ssc(dev_priv) && num_connectors < 2) 4593 intel_panel_use_ssc(dev_priv) && num_connectors < 2)
@@ -5598,7 +5598,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
5598 struct intel_encoder *intel_encoder; 5598 struct intel_encoder *intel_encoder;
5599 uint32_t dpll; 5599 uint32_t dpll;
5600 int factor, num_connectors = 0; 5600 int factor, num_connectors = 0;
5601 bool is_lvds = false, is_sdvo = false, is_tv = false; 5601 bool is_lvds = false, is_sdvo = false;
5602 5602
5603 for_each_encoder_on_crtc(dev, crtc, intel_encoder) { 5603 for_each_encoder_on_crtc(dev, crtc, intel_encoder) {
5604 switch (intel_encoder->type) { 5604 switch (intel_encoder->type) {
@@ -5608,8 +5608,6 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
5608 case INTEL_OUTPUT_SDVO: 5608 case INTEL_OUTPUT_SDVO:
5609 case INTEL_OUTPUT_HDMI: 5609 case INTEL_OUTPUT_HDMI:
5610 is_sdvo = true; 5610 is_sdvo = true;
5611 if (intel_encoder->needs_tv_clock)
5612 is_tv = true;
5613 break; 5611 break;
5614 } 5612 }
5615 5613
@@ -5623,7 +5621,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
5623 dev_priv->lvds_ssc_freq == 100) || 5621 dev_priv->lvds_ssc_freq == 100) ||
5624 (HAS_PCH_IBX(dev) && intel_is_dual_link_lvds(dev))) 5622 (HAS_PCH_IBX(dev) && intel_is_dual_link_lvds(dev)))
5625 factor = 25; 5623 factor = 25;
5626 } else if (is_sdvo && is_tv) 5624 } else if (intel_crtc->config.sdvo_tv_clock)
5627 factor = 20; 5625 factor = 20;
5628 5626
5629 if (ironlake_needs_fb_cb_tune(&intel_crtc->config.dpll, factor)) 5627 if (ironlake_needs_fb_cb_tune(&intel_crtc->config.dpll, factor))