diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-05-21 12:40:45 -0400 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2010-05-26 16:48:43 -0400 |
commit | 9517a92f48b08bb02cfb616825850b82b28461cc (patch) | |
tree | 03b77b31d47a5e2ebfc9fb37cf2fd294873531bb /drivers/gpu/drm/i915/intel_display.c | |
parent | d1b851fc0d105caa6b6e3e7c92d2987dfb52cbe0 (diff) |
drm/i915: add timeout to FBC disable waits
FBC disable on 965 can take long enough to trigger latency checks in the
kernel so be sure to timeout after a reasonable period.
Fixes https://bugzilla.kernel.org/show_bug.cgi?id=15015.
Tested-by: James Ettle <theholyettlz@googlemail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b867f3c78408..36afe9409964 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1029,19 +1029,28 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1029 | void i8xx_disable_fbc(struct drm_device *dev) | 1029 | void i8xx_disable_fbc(struct drm_device *dev) |
1030 | { | 1030 | { |
1031 | struct drm_i915_private *dev_priv = dev->dev_private; | 1031 | struct drm_i915_private *dev_priv = dev->dev_private; |
1032 | unsigned long timeout = jiffies + msecs_to_jiffies(1); | ||
1032 | u32 fbc_ctl; | 1033 | u32 fbc_ctl; |
1033 | 1034 | ||
1034 | if (!I915_HAS_FBC(dev)) | 1035 | if (!I915_HAS_FBC(dev)) |
1035 | return; | 1036 | return; |
1036 | 1037 | ||
1038 | if (!(I915_READ(FBC_CONTROL) & FBC_CTL_EN)) | ||
1039 | return; /* Already off, just return */ | ||
1040 | |||
1037 | /* Disable compression */ | 1041 | /* Disable compression */ |
1038 | fbc_ctl = I915_READ(FBC_CONTROL); | 1042 | fbc_ctl = I915_READ(FBC_CONTROL); |
1039 | fbc_ctl &= ~FBC_CTL_EN; | 1043 | fbc_ctl &= ~FBC_CTL_EN; |
1040 | I915_WRITE(FBC_CONTROL, fbc_ctl); | 1044 | I915_WRITE(FBC_CONTROL, fbc_ctl); |
1041 | 1045 | ||
1042 | /* Wait for compressing bit to clear */ | 1046 | /* Wait for compressing bit to clear */ |
1043 | while (I915_READ(FBC_STATUS) & FBC_STAT_COMPRESSING) | 1047 | while (I915_READ(FBC_STATUS) & FBC_STAT_COMPRESSING) { |
1044 | ; /* nothing */ | 1048 | if (time_after(jiffies, timeout)) { |
1049 | DRM_DEBUG_DRIVER("FBC idle timed out\n"); | ||
1050 | break; | ||
1051 | } | ||
1052 | ; /* do nothing */ | ||
1053 | } | ||
1045 | 1054 | ||
1046 | intel_wait_for_vblank(dev); | 1055 | intel_wait_for_vblank(dev); |
1047 | 1056 | ||