drm/i915: diasable clock gating for the panel power sequencer

Needed on Ibex Peak and Cougar Point or the panel won't always come on.

Cc: stable@kernel.org
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

1 files changed, 7 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 89cfe4684147..8e98d708f970 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5746,6 +5746,13 @@ void intel_init_clock_gating(struct drm_device *dev)
                 I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);
 
                 /*
+                 * On Ibex Peak and Cougar Point, we need to disable clock
+                 * gating for the panel power sequencer or it will fail to
+                 * start up when no ports are active.
+                 */
+                I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
+
+                /*
                  * According to the spec the following bits should be set in
                  * order to enable memory self-refresh
                  * The bit 22/21 of 0x42004