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authorIngo Molnar <mingo@kernel.org>2014-05-22 04:28:56 -0400
committerIngo Molnar <mingo@kernel.org>2014-05-22 04:28:56 -0400
commit65c2ce70046c779974af8b5dfc25a0df489089b5 (patch)
treeb16f152eb62b71cf5a1edc51da865b357c989922 /drivers/gpu/drm/i915/intel_bios.c
parent842514849a616e9b61acad65771c7afe01e651f9 (diff)
parent4b660a7f5c8099d88d1a43d8ae138965112592c7 (diff)
Merge tag 'v3.15-rc6' into sched/core, to pick up the latest fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_bios.c')
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c52
1 files changed, 38 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index fa486c5fbb02..aff4a113cda3 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -560,47 +560,71 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
560 560
561 dev_priv->vbt.edp_pps = *edp_pps; 561 dev_priv->vbt.edp_pps = *edp_pps;
562 562
563 dev_priv->vbt.edp_rate = edp_link_params->rate ? DP_LINK_BW_2_7 : 563 switch (edp_link_params->rate) {
564 DP_LINK_BW_1_62; 564 case EDP_RATE_1_62:
565 dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
566 break;
567 case EDP_RATE_2_7:
568 dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
569 break;
570 default:
571 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
572 edp_link_params->rate);
573 break;
574 }
575
565 switch (edp_link_params->lanes) { 576 switch (edp_link_params->lanes) {
566 case 0: 577 case EDP_LANE_1:
567 dev_priv->vbt.edp_lanes = 1; 578 dev_priv->vbt.edp_lanes = 1;
568 break; 579 break;
569 case 1: 580 case EDP_LANE_2:
570 dev_priv->vbt.edp_lanes = 2; 581 dev_priv->vbt.edp_lanes = 2;
571 break; 582 break;
572 case 3: 583 case EDP_LANE_4:
573 default:
574 dev_priv->vbt.edp_lanes = 4; 584 dev_priv->vbt.edp_lanes = 4;
575 break; 585 break;
586 default:
587 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
588 edp_link_params->lanes);
589 break;
576 } 590 }
591
577 switch (edp_link_params->preemphasis) { 592 switch (edp_link_params->preemphasis) {
578 case 0: 593 case EDP_PREEMPHASIS_NONE:
579 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0; 594 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
580 break; 595 break;
581 case 1: 596 case EDP_PREEMPHASIS_3_5dB:
582 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5; 597 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
583 break; 598 break;
584 case 2: 599 case EDP_PREEMPHASIS_6dB:
585 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6; 600 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
586 break; 601 break;
587 case 3: 602 case EDP_PREEMPHASIS_9_5dB:
588 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5; 603 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
589 break; 604 break;
605 default:
606 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
607 edp_link_params->preemphasis);
608 break;
590 } 609 }
610
591 switch (edp_link_params->vswing) { 611 switch (edp_link_params->vswing) {
592 case 0: 612 case EDP_VSWING_0_4V:
593 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400; 613 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400;
594 break; 614 break;
595 case 1: 615 case EDP_VSWING_0_6V:
596 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600; 616 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600;
597 break; 617 break;
598 case 2: 618 case EDP_VSWING_0_8V:
599 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800; 619 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800;
600 break; 620 break;
601 case 3: 621 case EDP_VSWING_1_2V:
602 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200; 622 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200;
603 break; 623 break;
624 default:
625 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
626 edp_link_params->vswing);
627 break;
604 } 628 }
605} 629}
606 630