drm/i915: sprite support for ValleyView v4

No constant alpha yet though, that needs a new ioctl and/or property to
get/set.

v2: use drm_plane_format_cpp (Ville)
    fix up vlv_disable_plane, remove IVB bits (Ville)
    remove error path rework (Ville)
    fix component order confusion (Ville)
    clean up platform init (Ville)
    use compute_offset_xtiled (Ville)
v3: fix up more format confusion (Ville)
    update to new page offset function (Ville)
v4: remove incorrect formats from framebuffer_init (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 57 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 95ad87c2981d..70d7949ecca0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3288,6 +3288,63 @@
 #define SPRGAMC(pipe) _PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC)
 #define SPRSURFLIVE(pipe) _PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)
 
+#define _SPACNTR                0x72180
+#define   SP_ENABLE                     (1<<31)
+#define   SP_GEAMMA_ENABLE              (1<<30)
+#define   SP_PIXFORMAT_MASK             (0xf<<26)
+#define   SP_FORMAT_YUV422              (0<<26)
+#define   SP_FORMAT_BGR565              (5<<26)
+#define   SP_FORMAT_BGRX8888            (6<<26)
+#define   SP_FORMAT_BGRA8888            (7<<26)
+#define   SP_FORMAT_RGBX1010102         (8<<26)
+#define   SP_FORMAT_RGBA1010102         (9<<26)
+#define   SP_FORMAT_RGBX8888            (0xe<<26)
+#define   SP_FORMAT_RGBA8888            (0xf<<26)
+#define   SP_SOURCE_KEY                 (1<<22)
+#define   SP_YUV_BYTE_ORDER_MASK        (3<<16)
+#define   SP_YUV_ORDER_YUYV             (0<<16)
+#define   SP_YUV_ORDER_UYVY             (1<<16)
+#define   SP_YUV_ORDER_YVYU             (2<<16)
+#define   SP_YUV_ORDER_VYUY             (3<<16)
+#define   SP_TILED                      (1<<10)
+#define _SPALINOFF              0x72184
+#define _SPASTRIDE              0x72188
+#define _SPAPOS                 0x7218c
+#define _SPASIZE                0x72190
+#define _SPAKEYMINVAL           0x72194
+#define _SPAKEYMSK              0x72198
+#define _SPASURF                0x7219c
+#define _SPAKEYMAXVAL           0x721a0
+#define _SPATILEOFF             0x721a4
+#define _SPACONSTALPHA          0x721a8
+#define _SPAGAMC                0x721f4
+
+#define _SPBCNTR                0x72280
+#define _SPBLINOFF              0x72284
+#define _SPBSTRIDE              0x72288
+#define _SPBPOS                 0x7228c
+#define _SPBSIZE                0x72290
+#define _SPBKEYMINVAL           0x72294
+#define _SPBKEYMSK              0x72298
+#define _SPBSURF                0x7229c
+#define _SPBKEYMAXVAL           0x722a0
+#define _SPBTILEOFF             0x722a4
+#define _SPBCONSTALPHA          0x722a8
+#define _SPBGAMC                0x722f4
+
+#define SPCNTR(pipe, plane) _PIPE(pipe * 2 + plane, _SPACNTR, _SPBCNTR)
+#define SPLINOFF(pipe, plane) _PIPE(pipe * 2 + plane, _SPALINOFF, _SPBLINOFF)
+#define SPSTRIDE(pipe, plane) _PIPE(pipe * 2 + plane, _SPASTRIDE, _SPBSTRIDE)
+#define SPPOS(pipe, plane) _PIPE(pipe * 2 + plane, _SPAPOS, _SPBPOS)
+#define SPSIZE(pipe, plane) _PIPE(pipe * 2 + plane, _SPASIZE, _SPBSIZE)
+#define SPKEYMINVAL(pipe, plane) _PIPE(pipe * 2 + plane, _SPAKEYMINVAL, _SPBKEYMINVAL)
+#define SPKEYMSK(pipe, plane) _PIPE(pipe * 2 + plane, _SPAKEYMSK, _SPBKEYMSK)
+#define SPSURF(pipe, plane) _PIPE(pipe * 2 + plane, _SPASURF, _SPBSURF)
+#define SPKEYMAXVAL(pipe, plane) _PIPE(pipe * 2 + plane, _SPAKEYMAXVAL, _SPBKEYMAXVAL)
+#define SPTILEOFF(pipe, plane) _PIPE(pipe * 2 + plane, _SPATILEOFF, _SPBTILEOFF)
+#define SPCONSTALPHA(pipe, plane) _PIPE(pipe * 2 + plane, _SPACONSTALPHA, _SPBCONSTALPHA)
+#define SPGAMC(pipe, plane) _PIPE(pipe * 2 + plane, _SPAGAMC, _SPBGAMC)
+
 /* VBIOS regs */
 #define VGACNTRL                0x71400
 # define VGA_DISP_DISABLE                       (1 << 31)