diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-19 06:19:32 -0400 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-21 14:08:39 -0400 |
commit | 549f7365820a212a1cfd0871d377b1ad0d1e5723 (patch) | |
tree | dbd39c10b32b35b762b083a358b7fc4c09783d5b /drivers/gpu/drm/i915/i915_reg.h | |
parent | e36c1cd7292efcb8daca26cd6331481736544742 (diff) |
drm/i915: Enable SandyBridge blitter ring
Based on an original patch by Zhenyu Wang, this initializes the BLT ring for
SandyBridge and enables support for user execbuffers.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 557f27134d05..c52e209321c1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -263,6 +263,7 @@ | |||
263 | #define RENDER_RING_BASE 0x02000 | 263 | #define RENDER_RING_BASE 0x02000 |
264 | #define BSD_RING_BASE 0x04000 | 264 | #define BSD_RING_BASE 0x04000 |
265 | #define GEN6_BSD_RING_BASE 0x12000 | 265 | #define GEN6_BSD_RING_BASE 0x12000 |
266 | #define BLT_RING_BASE 0x22000 | ||
266 | #define RING_TAIL(base) ((base)+0x30) | 267 | #define RING_TAIL(base) ((base)+0x30) |
267 | #define RING_HEAD(base) ((base)+0x34) | 268 | #define RING_HEAD(base) ((base)+0x34) |
268 | #define RING_START(base) ((base)+0x38) | 269 | #define RING_START(base) ((base)+0x38) |
@@ -2561,6 +2562,7 @@ | |||
2561 | #define GT_USER_INTERRUPT (1 << 0) | 2562 | #define GT_USER_INTERRUPT (1 << 0) |
2562 | #define GT_BSD_USER_INTERRUPT (1 << 5) | 2563 | #define GT_BSD_USER_INTERRUPT (1 << 5) |
2563 | #define GT_GEN6_BSD_USER_INTERRUPT (1 << 12) | 2564 | #define GT_GEN6_BSD_USER_INTERRUPT (1 << 12) |
2565 | #define GT_BLT_USER_INTERRUPT (1 << 22) | ||
2564 | 2566 | ||
2565 | #define GTISR 0x44010 | 2567 | #define GTISR 0x44010 |
2566 | #define GTIMR 0x44014 | 2568 | #define GTIMR 0x44014 |