drm/i915: Fix DDC on some systems by clearing BIOS GMBUS setup.

This is a sync of a fix I made in the old UMS code.  If the BIOS uses
the GMBUS and doesn't clear that setup, then our bit-banging I2C can
fail, leading to monitors not being detected.

Signed-off-by: Eric Anholt <eric@anholt.net>

1 files changed, 14 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6b596020d362..c4a273513b2f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -414,6 +414,13 @@
 # define GPIO_DATA_VAL_IN               (1 << 12)
 # define GPIO_DATA_PULLUP_DISABLE       (1 << 13)
 
+#define GMBUS0                  0x5100
+#define GMBUS1                  0x5104
+#define GMBUS2                  0x5108
+#define GMBUS3                  0x510c
+#define GMBUS4                  0x5110
+#define GMBUS5                  0x5120
+
 /*
  * Clock control & power management
  */
@@ -2166,6 +2173,13 @@
 #define PCH_GPIOE               0xc5020
 #define PCH_GPIOF               0xc5024
 
+#define PCH_GMBUS0              0xc5100
+#define PCH_GMBUS1              0xc5104
+#define PCH_GMBUS2              0xc5108
+#define PCH_GMBUS3              0xc510c
+#define PCH_GMBUS4              0xc5110
+#define PCH_GMBUS5              0xc5120
+
 #define PCH_DPLL_A              0xc6014
 #define PCH_DPLL_B              0xc6018