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authorDamien Lespiau <damien.lespiau@intel.com>2015-02-09 14:33:18 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-02-13 17:28:35 -0500
commit8bc0ccf6b1f0c0c6eef8301cb2a5b743a01635db (patch)
treee3f2400e5728667c4acfeac58fca4ef5932c5a45 /drivers/gpu/drm/i915/i915_reg.h
parent9370cd987e91d6d652ebe6d883fbc51b10df2403 (diff)
drm/i915/skl: Implement WaDisableLSQCROPERFforOCL
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Nick Hoath <nicholas.hoath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b610764768d7..0fb6a4f6c6f7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5259,6 +5259,9 @@ enum skl_disp_power_wells {
5259#define GEN7_L3SQCREG4 0xb034 5259#define GEN7_L3SQCREG4 0xb034
5260#define L3SQ_URB_READ_CAM_MATCH_DISABLE (1<<27) 5260#define L3SQ_URB_READ_CAM_MATCH_DISABLE (1<<27)
5261 5261
5262#define GEN8_L3SQCREG4 0xb118
5263#define GEN8_LQSC_RO_PERF_DIS (1<<27)
5264
5262/* GEN8 chicken */ 5265/* GEN8 chicken */
5263#define HDC_CHICKEN0 0x7300 5266#define HDC_CHICKEN0 0x7300
5264#define HDC_FENCE_DEST_SLM_DISABLE (1<<14) 5267#define HDC_FENCE_DEST_SLM_DISABLE (1<<14)