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authorDamien Lespiau <damien.lespiau@intel.com>2015-02-09 14:33:20 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-02-13 17:28:36 -0500
commit2caa3b260aa6a3d015352c07d1bce1461825fa6c (patch)
tree4148e39ea28bf1b9cec9fd721741cfc5feca216d /drivers/gpu/drm/i915/i915_reg.h
parent81e231afe7478f1bf14bbb17c26d6ebf054faece (diff)
drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCS
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Nick Hoath <nicholas.hoath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 75227009d0bb..ecc14f558744 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5236,6 +5236,9 @@ enum skl_disp_power_wells {
5236#define HSW_NDE_RSTWRN_OPT 0x46408 5236#define HSW_NDE_RSTWRN_OPT 0x46408
5237#define RESET_PCH_HANDSHAKE_ENABLE (1<<4) 5237#define RESET_PCH_HANDSHAKE_ENABLE (1<<4)
5238 5238
5239#define FF_SLICE_CS_CHICKEN2 0x02e4
5240#define GEN9_TSG_BARRIER_ACK_DISABLE (1<<8)
5241
5239/* GEN7 chicken */ 5242/* GEN7 chicken */
5240#define GEN7_COMMON_SLICE_CHICKEN1 0x7010 5243#define GEN7_COMMON_SLICE_CHICKEN1 0x7010
5241# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26)) 5244# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26))