diff options
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-08-30 04:12:42 -0400 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-07 06:16:44 -0400 |
| commit | a69ffdbfcba8eabf2ca9d384b578e6f28b339c61 (patch) | |
| tree | e0cadb457d040e9ae08f54f86bf6a2e3c0bd6210 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | f8f235e5bbf4e61f3e0886a44afb1dc4cfe8f337 (diff) | |
drm/i915: Enable MI_FLUSH on Sandybridge
MI_FLUSH is being deprecated, but still available on Sandybridge.
Make sure it's enabled as userspace still uses MI_FLUSH.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: stable@kernel.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 67e3ec1a6af9..d094e9129223 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
| @@ -319,6 +319,7 @@ | |||
| 319 | 319 | ||
| 320 | #define MI_MODE 0x0209c | 320 | #define MI_MODE 0x0209c |
| 321 | # define VS_TIMER_DISPATCH (1 << 6) | 321 | # define VS_TIMER_DISPATCH (1 << 6) |
| 322 | # define MI_FLUSH_ENABLE (1 << 11) | ||
| 322 | 323 | ||
| 323 | #define SCPD0 0x0209c /* 915+ only */ | 324 | #define SCPD0 0x0209c /* 915+ only */ |
| 324 | #define IER 0x020a0 | 325 | #define IER 0x020a0 |