diff options
author | Zhao Yakui <yakui.zhao@intel.com> | 2009-10-28 01:10:00 -0400 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2009-11-05 17:49:13 -0500 |
commit | 01c66889c14aa163c49355b3be2ccfb214500599 (patch) | |
tree | 278e3e9a1fb0001d61d531804e8db6ea83bc712c /drivers/gpu/drm/i915/i915_opregion.c | |
parent | 1dc7546d1a73664e5d117715b214bea9cae5951c (diff) |
drm/i915: Add ACPI OpRegion support for Ironlake
Add the support of ACPI opregion on Ironlake so that the backlight
brightness can be adjusted by using ACPI interface
>/sys/class/backlight/acpi_video0/brightness
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Tested-by: Zhao Yakui <yakui.zhao@intel.com>
[zhenyuw: cleanups, fix typo for checking GSE irq and convert to
current irq handling logic.]
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_opregion.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_opregion.c | 74 |
1 files changed, 72 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_opregion.c b/drivers/gpu/drm/i915/i915_opregion.c index 9032bda35e2a..313a1a11afab 100644 --- a/drivers/gpu/drm/i915/i915_opregion.c +++ b/drivers/gpu/drm/i915/i915_opregion.c | |||
@@ -118,6 +118,10 @@ struct opregion_asle { | |||
118 | #define ASLE_BACKLIGHT_FAIL (2<<12) | 118 | #define ASLE_BACKLIGHT_FAIL (2<<12) |
119 | #define ASLE_PFIT_FAIL (2<<14) | 119 | #define ASLE_PFIT_FAIL (2<<14) |
120 | #define ASLE_PWM_FREQ_FAIL (2<<16) | 120 | #define ASLE_PWM_FREQ_FAIL (2<<16) |
121 | #define ASLE_ALS_ILLUM_FAILED (1<<10) | ||
122 | #define ASLE_BACKLIGHT_FAILED (1<<12) | ||
123 | #define ASLE_PFIT_FAILED (1<<14) | ||
124 | #define ASLE_PWM_FREQ_FAILED (1<<16) | ||
121 | 125 | ||
122 | /* ASLE backlight brightness to set */ | 126 | /* ASLE backlight brightness to set */ |
123 | #define ASLE_BCLP_VALID (1<<31) | 127 | #define ASLE_BCLP_VALID (1<<31) |
@@ -243,6 +247,73 @@ void opregion_asle_intr(struct drm_device *dev) | |||
243 | asle->aslc = asle_stat; | 247 | asle->aslc = asle_stat; |
244 | } | 248 | } |
245 | 249 | ||
250 | static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp) | ||
251 | { | ||
252 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
253 | struct opregion_asle *asle = dev_priv->opregion.asle; | ||
254 | u32 cpu_pwm_ctl, pch_pwm_ctl2; | ||
255 | u32 max_backlight, level; | ||
256 | |||
257 | if (!(bclp & ASLE_BCLP_VALID)) | ||
258 | return ASLE_BACKLIGHT_FAILED; | ||
259 | |||
260 | bclp &= ASLE_BCLP_MSK; | ||
261 | if (bclp < 0 || bclp > 255) | ||
262 | return ASLE_BACKLIGHT_FAILED; | ||
263 | |||
264 | cpu_pwm_ctl = I915_READ(BLC_PWM_CPU_CTL); | ||
265 | pch_pwm_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | ||
266 | /* get the max PWM frequency */ | ||
267 | max_backlight = (pch_pwm_ctl2 >> 16) & BACKLIGHT_DUTY_CYCLE_MASK; | ||
268 | /* calculate the expected PMW frequency */ | ||
269 | level = (bclp * max_backlight) / 255; | ||
270 | /* reserve the high 16 bits */ | ||
271 | cpu_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK); | ||
272 | /* write the updated PWM frequency */ | ||
273 | I915_WRITE(BLC_PWM_CPU_CTL, cpu_pwm_ctl | level); | ||
274 | |||
275 | asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID; | ||
276 | |||
277 | return 0; | ||
278 | } | ||
279 | |||
280 | void ironlake_opregion_gse_intr(struct drm_device *dev) | ||
281 | { | ||
282 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
283 | struct opregion_asle *asle = dev_priv->opregion.asle; | ||
284 | u32 asle_stat = 0; | ||
285 | u32 asle_req; | ||
286 | |||
287 | if (!asle) | ||
288 | return; | ||
289 | |||
290 | asle_req = asle->aslc & ASLE_REQ_MSK; | ||
291 | |||
292 | if (!asle_req) { | ||
293 | DRM_DEBUG_DRIVER("non asle set request??\n"); | ||
294 | return; | ||
295 | } | ||
296 | |||
297 | if (asle_req & ASLE_SET_ALS_ILLUM) { | ||
298 | DRM_DEBUG_DRIVER("Illum is not supported\n"); | ||
299 | asle_stat |= ASLE_ALS_ILLUM_FAILED; | ||
300 | } | ||
301 | |||
302 | if (asle_req & ASLE_SET_BACKLIGHT) | ||
303 | asle_stat |= asle_set_backlight_ironlake(dev, asle->bclp); | ||
304 | |||
305 | if (asle_req & ASLE_SET_PFIT) { | ||
306 | DRM_DEBUG_DRIVER("Pfit is not supported\n"); | ||
307 | asle_stat |= ASLE_PFIT_FAILED; | ||
308 | } | ||
309 | |||
310 | if (asle_req & ASLE_SET_PWM_FREQ) { | ||
311 | DRM_DEBUG_DRIVER("PWM freq is not supported\n"); | ||
312 | asle_stat |= ASLE_PWM_FREQ_FAILED; | ||
313 | } | ||
314 | |||
315 | asle->aslc = asle_stat; | ||
316 | } | ||
246 | #define ASLE_ALS_EN (1<<0) | 317 | #define ASLE_ALS_EN (1<<0) |
247 | #define ASLE_BLC_EN (1<<1) | 318 | #define ASLE_BLC_EN (1<<1) |
248 | #define ASLE_PFIT_EN (1<<2) | 319 | #define ASLE_PFIT_EN (1<<2) |
@@ -258,8 +329,7 @@ void opregion_enable_asle(struct drm_device *dev) | |||
258 | unsigned long irqflags; | 329 | unsigned long irqflags; |
259 | 330 | ||
260 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); | 331 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
261 | i915_enable_pipestat(dev_priv, 1, | 332 | intel_enable_asle(dev); |
262 | I915_LEGACY_BLC_EVENT_ENABLE); | ||
263 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, | 333 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, |
264 | irqflags); | 334 | irqflags); |
265 | } | 335 | } |