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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2014-04-01 14:37:09 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-04-01 17:05:57 -0400
commita9d356a6b8480950d3e4bf49c89c003d87692a18 (patch)
treeb874b1e80979275f0dcb371d40fbafa8d0fa1de9 /drivers/gpu/drm/i915/i915_irq.c
parent83a7280ebc359726d4b79b8772c9fddd7fd03f43 (diff)
drm/i915: add GEN5_IRQ_INIT macro
The goal is to reuse the GEN8 macros, but a few changes are needed, so let's make things easier to review. I could also use these macros on older code, but since I plan to change how the interrupts are initialized, we'll risk breaking the older code in the next commits, so I'll leave this out for now. v2: - Rebase. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c24
1 files changed, 10 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2163f18a6e1b..f487068e8f5a 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -80,6 +80,12 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
80 [HPD_PORT_D] = PORTD_HOTPLUG_INT_STATUS 80 [HPD_PORT_D] = PORTD_HOTPLUG_INT_STATUS
81}; 81};
82 82
83#define GEN5_IRQ_INIT(type) do { \
84 I915_WRITE(type##IMR, 0xffffffff); \
85 I915_WRITE(type##IER, 0); \
86 POSTING_READ(type##IER); \
87} while (0)
88
83/* For display hotplug interrupt */ 89/* For display hotplug interrupt */
84static void 90static void
85ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask) 91ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
@@ -2837,17 +2843,9 @@ static void gen5_gt_irq_preinstall(struct drm_device *dev)
2837{ 2843{
2838 struct drm_i915_private *dev_priv = dev->dev_private; 2844 struct drm_i915_private *dev_priv = dev->dev_private;
2839 2845
2840 /* and GT */ 2846 GEN5_IRQ_INIT(GT);
2841 I915_WRITE(GTIMR, 0xffffffff); 2847 if (INTEL_INFO(dev)->gen >= 6)
2842 I915_WRITE(GTIER, 0x0); 2848 GEN5_IRQ_INIT(GEN6_PM);
2843 POSTING_READ(GTIER);
2844
2845 if (INTEL_INFO(dev)->gen >= 6) {
2846 /* and PM */
2847 I915_WRITE(GEN6_PMIMR, 0xffffffff);
2848 I915_WRITE(GEN6_PMIER, 0x0);
2849 POSTING_READ(GEN6_PMIER);
2850 }
2851} 2849}
2852 2850
2853/* drm_dma.h hooks 2851/* drm_dma.h hooks
@@ -2858,9 +2856,7 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
2858 2856
2859 I915_WRITE(HWSTAM, 0xeffe); 2857 I915_WRITE(HWSTAM, 0xeffe);
2860 2858
2861 I915_WRITE(DEIMR, 0xffffffff); 2859 GEN5_IRQ_INIT(DE);
2862 I915_WRITE(DEIER, 0x0);
2863 POSTING_READ(DEIER);
2864 2860
2865 gen5_gt_irq_preinstall(dev); 2861 gen5_gt_irq_preinstall(dev);
2866 2862