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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-05-15 13:23:23 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-05-22 09:06:38 -0400
commit80715b2f7b97154ad8d791ddf85a386081fcceab (patch)
treee1608bab20af0e6eaf2aae99d88675af31a047f8 /drivers/gpu/drm/i915/i915_irq.c
parentf75f3746e801504531bffc9f92e1d4a271705f7e (diff)
drm/i915: Fix gen2 and hsw+ scanline counter
On gen2 the scanline counter behaves a bit differently from the later generations. Instead of adding one to the raw scanline counter value, we must subtract one. On HSW/BDW the scanline counter requires a +2 adjustment on HDMI outputs. DP outputs on the on the other require the typical +1 adjustment. As the fixup we must apply to the hardware scanline counter depends on several factors, compute the desired offset at modeset time and tuck it away for when it's needed. v2: Clarify HSW+ situation Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: "Akash Goel <akash.goels@gmail.com>" Reviewed-by: "Sourab Gupta <sourabgupta@gmail.com>" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78997 Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c14
1 files changed, 5 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 087e76b9ee35..304f86a3162c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -889,9 +889,9 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
889 struct drm_i915_private *dev_priv = dev->dev_private; 889 struct drm_i915_private *dev_priv = dev->dev_private;
890 const struct drm_display_mode *mode = &crtc->config.adjusted_mode; 890 const struct drm_display_mode *mode = &crtc->config.adjusted_mode;
891 enum pipe pipe = crtc->pipe; 891 enum pipe pipe = crtc->pipe;
892 int vtotal = mode->crtc_vtotal; 892 int position, vtotal;
893 int position;
894 893
894 vtotal = mode->crtc_vtotal;
895 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 895 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
896 vtotal /= 2; 896 vtotal /= 2;
897 897
@@ -901,14 +901,10 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
901 position = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) & DSL_LINEMASK_GEN3; 901 position = __raw_i915_read32(dev_priv, PIPEDSL(pipe)) & DSL_LINEMASK_GEN3;
902 902
903 /* 903 /*
904 * Scanline counter increments at leading edge of hsync, and 904 * See update_scanline_offset() for the details on the
905 * it starts counting from vtotal-1 on the first active line. 905 * scanline_offset adjustment.
906 * That means the scanline counter value is always one less
907 * than what we would expect. Ie. just after start of vblank,
908 * which also occurs at start of hsync (on the last active line),
909 * the scanline counter will read vblank_start-1.
910 */ 906 */
911 return (position + 1) % vtotal; 907 return (position + crtc->scanline_offset) % vtotal;
912} 908}
913 909
914static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe, 910static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,