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authorJesse Barnes <jbarnes@virtuousgeek.org>2009-02-06 13:22:41 -0500
committerDave Airlie <airlied@linux.ie>2009-02-08 06:43:04 -0500
commit9880b7a527ffbb52f65c2de0a8d4eea86e24775e (patch)
tree5c41b544a86c04de609c4dad245bb93cd2e000e7 /drivers/gpu/drm/i915/i915_irq.c
parent14d200c5e5bd19219d930bbb9a5a22758c8f5bec (diff)
drm/i915: add get_vblank_counter function for GM45
As discussed in the long thread about vblank related timeouts, it turns out GM45 has different frame count registers than previous chips. This patch adds support for them, which prevents us from waiting on really stale sequence values in drm_wait_vblank (which rather than returning immediately ends up timing out or getting interrupted). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 6290219de6c8..548ff2c66431 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -174,6 +174,19 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
174 return count; 174 return count;
175} 175}
176 176
177u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
178{
179 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
180 int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
181
182 if (!i915_pipe_enabled(dev, pipe)) {
183 DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
184 return 0;
185 }
186
187 return I915_READ(reg);
188}
189
177irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) 190irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
178{ 191{
179 struct drm_device *dev = (struct drm_device *) arg; 192 struct drm_device *dev = (struct drm_device *) arg;