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authorBen Widawsky <ben@bwidawsk.net>2012-05-25 19:56:23 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-31 06:07:13 -0400
commit15b9f80e008f584d1a3835bb5eba194080e4e750 (patch)
tree532752dc026b075a48ae5c6e66e3e506e86c758e /drivers/gpu/drm/i915/i915_irq.c
parente36891900855b3bed5d9cc9209655e6dfa435a5f (diff)
drm/i915: enable parity error interrupts
The previous patch put all the code, and handlers in place. It should now be safe to enable the parity error interrupt. The parity error must be unmasked in both the GTIMR, and the CS IMR. Unfortunately, the docs aren't clear about this; nevertheless it's the truth. Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index c5266355973b..4a457521d76e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1889,13 +1889,13 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
1889 DE_PIPEA_VBLANK_IVB); 1889 DE_PIPEA_VBLANK_IVB);
1890 POSTING_READ(DEIER); 1890 POSTING_READ(DEIER);
1891 1891
1892 dev_priv->gt_irq_mask = ~0; 1892 dev_priv->gt_irq_mask = ~GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
1893 1893
1894 I915_WRITE(GTIIR, I915_READ(GTIIR)); 1894 I915_WRITE(GTIIR, I915_READ(GTIIR));
1895 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); 1895 I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
1896 1896
1897 render_irqs = GT_USER_INTERRUPT | GEN6_BSD_USER_INTERRUPT | 1897 render_irqs = GT_USER_INTERRUPT | GEN6_BSD_USER_INTERRUPT |
1898 GEN6_BLITTER_USER_INTERRUPT; 1898 GEN6_BLITTER_USER_INTERRUPT | GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
1899 I915_WRITE(GTIER, render_irqs); 1899 I915_WRITE(GTIER, render_irqs);
1900 POSTING_READ(GTIER); 1900 POSTING_READ(GTIER);
1901 1901