diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-11-08 14:18:58 -0500 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-11-23 15:19:10 -0500 |
commit | 05394f3975dceb107a5e1393e2244946e5b43660 (patch) | |
tree | 2af73b6efec503ed4cd9c932018619bd28a1fe60 /drivers/gpu/drm/i915/i915_irq.c | |
parent | 185cbcb304ba4dee55e39593fd86dcd7813f62ec (diff) |
drm/i915: Use drm_i915_gem_object as the preferred type
A glorified s/obj_priv/obj/ with a net reduction of over a 100 lines and
many characters!
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 67 |
1 files changed, 28 insertions, 39 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index a8f55f061f6d..09ac3bbd8165 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -423,28 +423,23 @@ static void i915_error_work_func(struct work_struct *work) | |||
423 | #ifdef CONFIG_DEBUG_FS | 423 | #ifdef CONFIG_DEBUG_FS |
424 | static struct drm_i915_error_object * | 424 | static struct drm_i915_error_object * |
425 | i915_error_object_create(struct drm_device *dev, | 425 | i915_error_object_create(struct drm_device *dev, |
426 | struct drm_gem_object *src) | 426 | struct drm_i915_gem_object *src) |
427 | { | 427 | { |
428 | drm_i915_private_t *dev_priv = dev->dev_private; | 428 | drm_i915_private_t *dev_priv = dev->dev_private; |
429 | struct drm_i915_error_object *dst; | 429 | struct drm_i915_error_object *dst; |
430 | struct drm_i915_gem_object *src_priv; | ||
431 | int page, page_count; | 430 | int page, page_count; |
432 | u32 reloc_offset; | 431 | u32 reloc_offset; |
433 | 432 | ||
434 | if (src == NULL) | 433 | if (src == NULL || src->pages == NULL) |
435 | return NULL; | 434 | return NULL; |
436 | 435 | ||
437 | src_priv = to_intel_bo(src); | 436 | page_count = src->base.size / PAGE_SIZE; |
438 | if (src_priv->pages == NULL) | ||
439 | return NULL; | ||
440 | |||
441 | page_count = src->size / PAGE_SIZE; | ||
442 | 437 | ||
443 | dst = kmalloc(sizeof(*dst) + page_count * sizeof (u32 *), GFP_ATOMIC); | 438 | dst = kmalloc(sizeof(*dst) + page_count * sizeof (u32 *), GFP_ATOMIC); |
444 | if (dst == NULL) | 439 | if (dst == NULL) |
445 | return NULL; | 440 | return NULL; |
446 | 441 | ||
447 | reloc_offset = src_priv->gtt_offset; | 442 | reloc_offset = src->gtt_offset; |
448 | for (page = 0; page < page_count; page++) { | 443 | for (page = 0; page < page_count; page++) { |
449 | unsigned long flags; | 444 | unsigned long flags; |
450 | void __iomem *s; | 445 | void __iomem *s; |
@@ -466,7 +461,7 @@ i915_error_object_create(struct drm_device *dev, | |||
466 | reloc_offset += PAGE_SIZE; | 461 | reloc_offset += PAGE_SIZE; |
467 | } | 462 | } |
468 | dst->page_count = page_count; | 463 | dst->page_count = page_count; |
469 | dst->gtt_offset = src_priv->gtt_offset; | 464 | dst->gtt_offset = src->gtt_offset; |
470 | 465 | ||
471 | return dst; | 466 | return dst; |
472 | 467 | ||
@@ -598,9 +593,9 @@ static u32 capture_bo_list(struct drm_i915_error_buffer *err, | |||
598 | static void i915_capture_error_state(struct drm_device *dev) | 593 | static void i915_capture_error_state(struct drm_device *dev) |
599 | { | 594 | { |
600 | struct drm_i915_private *dev_priv = dev->dev_private; | 595 | struct drm_i915_private *dev_priv = dev->dev_private; |
601 | struct drm_i915_gem_object *obj_priv; | 596 | struct drm_i915_gem_object *obj; |
602 | struct drm_i915_error_state *error; | 597 | struct drm_i915_error_state *error; |
603 | struct drm_gem_object *batchbuffer[2]; | 598 | struct drm_i915_gem_object *batchbuffer[2]; |
604 | unsigned long flags; | 599 | unsigned long flags; |
605 | u32 bbaddr; | 600 | u32 bbaddr; |
606 | int count; | 601 | int count; |
@@ -668,34 +663,30 @@ static void i915_capture_error_state(struct drm_device *dev) | |||
668 | batchbuffer[0] = NULL; | 663 | batchbuffer[0] = NULL; |
669 | batchbuffer[1] = NULL; | 664 | batchbuffer[1] = NULL; |
670 | count = 0; | 665 | count = 0; |
671 | list_for_each_entry(obj_priv, &dev_priv->mm.active_list, mm_list) { | 666 | list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) { |
672 | struct drm_gem_object *obj = &obj_priv->base; | ||
673 | |||
674 | if (batchbuffer[0] == NULL && | 667 | if (batchbuffer[0] == NULL && |
675 | bbaddr >= obj_priv->gtt_offset && | 668 | bbaddr >= obj->gtt_offset && |
676 | bbaddr < obj_priv->gtt_offset + obj->size) | 669 | bbaddr < obj->gtt_offset + obj->base.size) |
677 | batchbuffer[0] = obj; | 670 | batchbuffer[0] = obj; |
678 | 671 | ||
679 | if (batchbuffer[1] == NULL && | 672 | if (batchbuffer[1] == NULL && |
680 | error->acthd >= obj_priv->gtt_offset && | 673 | error->acthd >= obj->gtt_offset && |
681 | error->acthd < obj_priv->gtt_offset + obj->size) | 674 | error->acthd < obj->gtt_offset + obj->base.size) |
682 | batchbuffer[1] = obj; | 675 | batchbuffer[1] = obj; |
683 | 676 | ||
684 | count++; | 677 | count++; |
685 | } | 678 | } |
686 | /* Scan the other lists for completeness for those bizarre errors. */ | 679 | /* Scan the other lists for completeness for those bizarre errors. */ |
687 | if (batchbuffer[0] == NULL || batchbuffer[1] == NULL) { | 680 | if (batchbuffer[0] == NULL || batchbuffer[1] == NULL) { |
688 | list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list, mm_list) { | 681 | list_for_each_entry(obj, &dev_priv->mm.flushing_list, mm_list) { |
689 | struct drm_gem_object *obj = &obj_priv->base; | ||
690 | |||
691 | if (batchbuffer[0] == NULL && | 682 | if (batchbuffer[0] == NULL && |
692 | bbaddr >= obj_priv->gtt_offset && | 683 | bbaddr >= obj->gtt_offset && |
693 | bbaddr < obj_priv->gtt_offset + obj->size) | 684 | bbaddr < obj->gtt_offset + obj->base.size) |
694 | batchbuffer[0] = obj; | 685 | batchbuffer[0] = obj; |
695 | 686 | ||
696 | if (batchbuffer[1] == NULL && | 687 | if (batchbuffer[1] == NULL && |
697 | error->acthd >= obj_priv->gtt_offset && | 688 | error->acthd >= obj->gtt_offset && |
698 | error->acthd < obj_priv->gtt_offset + obj->size) | 689 | error->acthd < obj->gtt_offset + obj->base.size) |
699 | batchbuffer[1] = obj; | 690 | batchbuffer[1] = obj; |
700 | 691 | ||
701 | if (batchbuffer[0] && batchbuffer[1]) | 692 | if (batchbuffer[0] && batchbuffer[1]) |
@@ -703,17 +694,15 @@ static void i915_capture_error_state(struct drm_device *dev) | |||
703 | } | 694 | } |
704 | } | 695 | } |
705 | if (batchbuffer[0] == NULL || batchbuffer[1] == NULL) { | 696 | if (batchbuffer[0] == NULL || batchbuffer[1] == NULL) { |
706 | list_for_each_entry(obj_priv, &dev_priv->mm.inactive_list, mm_list) { | 697 | list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list) { |
707 | struct drm_gem_object *obj = &obj_priv->base; | ||
708 | |||
709 | if (batchbuffer[0] == NULL && | 698 | if (batchbuffer[0] == NULL && |
710 | bbaddr >= obj_priv->gtt_offset && | 699 | bbaddr >= obj->gtt_offset && |
711 | bbaddr < obj_priv->gtt_offset + obj->size) | 700 | bbaddr < obj->gtt_offset + obj->base.size) |
712 | batchbuffer[0] = obj; | 701 | batchbuffer[0] = obj; |
713 | 702 | ||
714 | if (batchbuffer[1] == NULL && | 703 | if (batchbuffer[1] == NULL && |
715 | error->acthd >= obj_priv->gtt_offset && | 704 | error->acthd >= obj->gtt_offset && |
716 | error->acthd < obj_priv->gtt_offset + obj->size) | 705 | error->acthd < obj->gtt_offset + obj->base.size) |
717 | batchbuffer[1] = obj; | 706 | batchbuffer[1] = obj; |
718 | 707 | ||
719 | if (batchbuffer[0] && batchbuffer[1]) | 708 | if (batchbuffer[0] && batchbuffer[1]) |
@@ -732,14 +721,14 @@ static void i915_capture_error_state(struct drm_device *dev) | |||
732 | 721 | ||
733 | /* Record the ringbuffer */ | 722 | /* Record the ringbuffer */ |
734 | error->ringbuffer = i915_error_object_create(dev, | 723 | error->ringbuffer = i915_error_object_create(dev, |
735 | dev_priv->render_ring.gem_object); | 724 | dev_priv->render_ring.obj); |
736 | 725 | ||
737 | /* Record buffers on the active and pinned lists. */ | 726 | /* Record buffers on the active and pinned lists. */ |
738 | error->active_bo = NULL; | 727 | error->active_bo = NULL; |
739 | error->pinned_bo = NULL; | 728 | error->pinned_bo = NULL; |
740 | 729 | ||
741 | error->active_bo_count = count; | 730 | error->active_bo_count = count; |
742 | list_for_each_entry(obj_priv, &dev_priv->mm.pinned_list, mm_list) | 731 | list_for_each_entry(obj, &dev_priv->mm.pinned_list, mm_list) |
743 | count++; | 732 | count++; |
744 | error->pinned_bo_count = count - error->active_bo_count; | 733 | error->pinned_bo_count = count - error->active_bo_count; |
745 | 734 | ||
@@ -948,7 +937,7 @@ static void i915_pageflip_stall_check(struct drm_device *dev, int pipe) | |||
948 | drm_i915_private_t *dev_priv = dev->dev_private; | 937 | drm_i915_private_t *dev_priv = dev->dev_private; |
949 | struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; | 938 | struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; |
950 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 939 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
951 | struct drm_i915_gem_object *obj_priv; | 940 | struct drm_i915_gem_object *obj; |
952 | struct intel_unpin_work *work; | 941 | struct intel_unpin_work *work; |
953 | unsigned long flags; | 942 | unsigned long flags; |
954 | bool stall_detected; | 943 | bool stall_detected; |
@@ -967,13 +956,13 @@ static void i915_pageflip_stall_check(struct drm_device *dev, int pipe) | |||
967 | } | 956 | } |
968 | 957 | ||
969 | /* Potential stall - if we see that the flip has happened, assume a missed interrupt */ | 958 | /* Potential stall - if we see that the flip has happened, assume a missed interrupt */ |
970 | obj_priv = to_intel_bo(work->pending_flip_obj); | 959 | obj = work->pending_flip_obj; |
971 | if (INTEL_INFO(dev)->gen >= 4) { | 960 | if (INTEL_INFO(dev)->gen >= 4) { |
972 | int dspsurf = intel_crtc->plane == 0 ? DSPASURF : DSPBSURF; | 961 | int dspsurf = intel_crtc->plane == 0 ? DSPASURF : DSPBSURF; |
973 | stall_detected = I915_READ(dspsurf) == obj_priv->gtt_offset; | 962 | stall_detected = I915_READ(dspsurf) == obj->gtt_offset; |
974 | } else { | 963 | } else { |
975 | int dspaddr = intel_crtc->plane == 0 ? DSPAADDR : DSPBADDR; | 964 | int dspaddr = intel_crtc->plane == 0 ? DSPAADDR : DSPBADDR; |
976 | stall_detected = I915_READ(dspaddr) == (obj_priv->gtt_offset + | 965 | stall_detected = I915_READ(dspaddr) == (obj->gtt_offset + |
977 | crtc->y * crtc->fb->pitch + | 966 | crtc->y * crtc->fb->pitch + |
978 | crtc->x * crtc->fb->bits_per_pixel/8); | 967 | crtc->x * crtc->fb->bits_per_pixel/8); |
979 | } | 968 | } |