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authorMatthew Garrett <mjg59@srcf.ucam.org>2008-08-05 14:37:25 -0400
committerDave Airlie <airlied@linux.ie>2008-10-17 17:10:10 -0400
commit8ee1c3db9075cb3211352e737e0feb98fd733b20 (patch)
treead91cc8b4ce57fdfdbac8920ba4b352a6871c782 /drivers/gpu/drm/i915/i915_irq.c
parent398c9cb20b5c6c5d1313912b937d653a46fec578 (diff)
Add Intel ACPI IGD OpRegion support
This adds the support necessary for allowing ACPI backlight control to work on some newer Intel-based graphics systems. Tested on Thinkpad T61 and HP 2510p hardware. Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c25
1 files changed, 17 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 24d11ed5bbc7..ae7d3a82a6d1 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -36,9 +36,11 @@
36/** These are the interrupts used by the driver */ 36/** These are the interrupts used by the driver */
37#define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \ 37#define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \
38 I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT | \ 38 I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT | \
39 I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT) 39 I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT | \
40 I915_ASLE_INTERRUPT | \
41 I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
40 42
41static inline void 43void
42i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask) 44i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask)
43{ 45{
44 if ((dev_priv->irq_mask_reg & mask) != 0) { 46 if ((dev_priv->irq_mask_reg & mask) != 0) {
@@ -274,6 +276,9 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
274 return IRQ_NONE; 276 return IRQ_NONE;
275 } 277 }
276 278
279 I915_WRITE(PIPEASTAT, pipea_stats);
280 I915_WRITE(PIPEBSTAT, pipeb_stats);
281
277 I915_WRITE(IIR, iir); 282 I915_WRITE(IIR, iir);
278 if (dev->pdev->msi_enabled) 283 if (dev->pdev->msi_enabled)
279 I915_WRITE(IMR, dev_priv->irq_mask_reg); 284 I915_WRITE(IMR, dev_priv->irq_mask_reg);
@@ -306,14 +311,14 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
306 311
307 if (dev_priv->swaps_pending > 0) 312 if (dev_priv->swaps_pending > 0)
308 drm_locked_tasklet(dev, i915_vblank_tasklet); 313 drm_locked_tasklet(dev, i915_vblank_tasklet);
309 I915_WRITE(PIPEASTAT,
310 pipea_stats|I915_VBLANK_INTERRUPT_ENABLE|
311 PIPE_VBLANK_INTERRUPT_STATUS);
312 I915_WRITE(PIPEBSTAT,
313 pipeb_stats|I915_VBLANK_INTERRUPT_ENABLE|
314 PIPE_VBLANK_INTERRUPT_STATUS);
315 } 314 }
316 315
316 if (iir & I915_ASLE_INTERRUPT)
317 opregion_asle_intr(dev);
318
319 if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
320 opregion_asle_intr(dev);
321
317 return IRQ_HANDLED; 322 return IRQ_HANDLED;
318} 323}
319 324
@@ -661,10 +666,14 @@ void i915_driver_irq_postinstall(struct drm_device * dev)
661 if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B) 666 if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)
662 dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT; 667 dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
663 668
669 dev_priv->irq_mask_reg &= I915_INTERRUPT_ENABLE_MASK;
670
664 I915_WRITE(IMR, dev_priv->irq_mask_reg); 671 I915_WRITE(IMR, dev_priv->irq_mask_reg);
665 I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK); 672 I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK);
666 (void) I915_READ(IER); 673 (void) I915_READ(IER);
667 674
675 opregion_enable_asle(dev);
676
668 DRM_INIT_WAITQUEUE(&dev_priv->irq_queue); 677 DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
669} 678}
670 679