drm/i915: Export ability of changing cache levels to userspace

By selecting the cache level (essentially whether or not the CPU snoops
any updates to the bo, and on more recent machines whether it resides
inside the CPU's last-level-cache) a userspace driver is able to then
manage all of its memory within buffer objects, if it so desires. This
enables the userspace driver to accelerate uploads and more importantly
downloads from the GPU and to able to mix CPU and GPU rendering/activity
efficiently.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Added code comment about where we plan to stuff platform
specific cacheing control bits in the ioctl struct.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 62 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 19bdc245a87a..c540321b42ba 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3015,6 +3015,68 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
         return 0;
 }
 
+int i915_gem_get_cacheing_ioctl(struct drm_device *dev, void *data,
+                                struct drm_file *file)
+{
+        struct drm_i915_gem_cacheing *args = data;
+        struct drm_i915_gem_object *obj;
+        int ret;
+
+        ret = i915_mutex_lock_interruptible(dev);
+        if (ret)
+                return ret;
+
+        obj = to_intel_bo(drm_gem_object_lookup(dev, file, args->handle));
+        if (&obj->base == NULL) {
+                ret = -ENOENT;
+                goto unlock;
+        }
+
+        args->cacheing = obj->cache_level != I915_CACHE_NONE;
+
+        drm_gem_object_unreference(&obj->base);
+unlock:
+        mutex_unlock(&dev->struct_mutex);
+        return ret;
+}
+
+int i915_gem_set_cacheing_ioctl(struct drm_device *dev, void *data,
+                                struct drm_file *file)
+{
+        struct drm_i915_gem_cacheing *args = data;
+        struct drm_i915_gem_object *obj;
+        enum i915_cache_level level;
+        int ret;
+
+        ret = i915_mutex_lock_interruptible(dev);
+        if (ret)
+                return ret;
+
+        switch (args->cacheing) {
+        case I915_CACHEING_NONE:
+                level = I915_CACHE_NONE;
+                break;
+        case I915_CACHEING_CACHED:
+                level = I915_CACHE_LLC;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        obj = to_intel_bo(drm_gem_object_lookup(dev, file, args->handle));
+        if (&obj->base == NULL) {
+                ret = -ENOENT;
+                goto unlock;
+        }
+
+        ret = i915_gem_object_set_cache_level(obj, level);
+
+        drm_gem_object_unreference(&obj->base);
+unlock:
+        mutex_unlock(&dev->struct_mutex);
+        return ret;
+}
+
 /*
  * Prepare buffer for display plane (scanout, cursors, etc).
  * Can be called from an uninterruptible phase (modesetting) and allows