diff options
author | Zou Nan hai <nanhai.zou@intel.com> | 2010-05-20 21:08:57 -0400 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2010-05-26 16:46:58 -0400 |
commit | d1b851fc0d105caa6b6e3e7c92d2987dfb52cbe0 (patch) | |
tree | 19f9c7d935725c513cd56ed14191f2827afe2f38 /drivers/gpu/drm/i915/i915_drv.h | |
parent | 852835f343146a82a528c3b712b373661d4fa17a (diff) |
drm/i915: implement BSD ring buffer V2
The BSD (bit stream decoder) ring is used for accessing the BSD engine
which decodes video bitstream for H.264 and VC1 on G45+. It is
asynchronous with the render ring and has access to separate parts of
the GPU from it, though the render cache is coherent between the two.
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Xiang Hai hao <haihao.xiang@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 3f35989ba74c..6bc0fc080f2b 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -235,6 +235,7 @@ typedef struct drm_i915_private { | |||
235 | 235 | ||
236 | struct pci_dev *bridge_dev; | 236 | struct pci_dev *bridge_dev; |
237 | struct intel_ring_buffer render_ring; | 237 | struct intel_ring_buffer render_ring; |
238 | struct intel_ring_buffer bsd_ring; | ||
238 | 239 | ||
239 | drm_dma_handle_t *status_page_dmah; | 240 | drm_dma_handle_t *status_page_dmah; |
240 | void *hw_status_page; | 241 | void *hw_status_page; |
@@ -1121,6 +1122,7 @@ extern int intel_trans_dp_port_sel (struct drm_crtc *crtc); | |||
1121 | (dev)->pci_device == 0x2A42 || \ | 1122 | (dev)->pci_device == 0x2A42 || \ |
1122 | (dev)->pci_device == 0x2E42) | 1123 | (dev)->pci_device == 0x2E42) |
1123 | 1124 | ||
1125 | #define HAS_BSD(dev) (IS_IRONLAKE(dev) || IS_G4X(dev)) | ||
1124 | #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) | 1126 | #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) |
1125 | 1127 | ||
1126 | /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte | 1128 | /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte |