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authorChris Wilson <chris@chris-wilson.co.uk>2013-10-30 05:28:22 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-30 05:37:58 -0400
commit94e39e282ecd299b095f37cd0f521d83bd799b14 (patch)
tree1c5588c1eb250b4d6eafd0da40365a744f0a2f7e /drivers/gpu/drm/i915/i915_drv.h
parentf4adcd247766e5b914f861ed143ff328f869bf80 (diff)
drm/i915: Capture batchbuffer state upon GPU hang
The bbstate contains useful bits of debugging information such as whether the batch is being read from GTT or PPGTT, or whether it is allowed to execute privileged instructions. v2: Only record BB_STATE for gen4+ Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 57715c8e59c6..8bc0b3b42183 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -299,6 +299,7 @@ struct drm_i915_error_state {
299 u32 cpu_ring_tail[I915_NUM_RINGS]; 299 u32 cpu_ring_tail[I915_NUM_RINGS];
300 u32 error; /* gen6+ */ 300 u32 error; /* gen6+ */
301 u32 err_int; /* gen7 */ 301 u32 err_int; /* gen7 */
302 u32 bbstate[I915_NUM_RINGS];
302 u32 instpm[I915_NUM_RINGS]; 303 u32 instpm[I915_NUM_RINGS];
303 u32 instps[I915_NUM_RINGS]; 304 u32 instps[I915_NUM_RINGS];
304 u32 extra_instdone[I915_NUM_INSTDONE_REG]; 305 u32 extra_instdone[I915_NUM_INSTDONE_REG];