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authorXiang, Haihao <haihao.xiang@intel.com>2010-09-15 22:43:10 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-21 06:19:54 -0400
commit92f49d9cec0052e09d938ac913d8e9ab432a0584 (patch)
tree8a89d64940b2f5577b4537a06911caf7d747f546 /drivers/gpu/drm/i915/i915_drv.h
parentf803aa5532d14efc463abbeae10faa115c457a07 (diff)
drm/i915: fix HAS_BSD with a device info flag
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b57e049a4623..4b6812015056 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -214,6 +214,7 @@ struct intel_device_info {
214 u8 has_overlay : 1; 214 u8 has_overlay : 1;
215 u8 overlay_needs_physical : 1; 215 u8 overlay_needs_physical : 1;
216 u8 supports_tv : 1; 216 u8 supports_tv : 1;
217 u8 has_bsd_ring : 1;
217}; 218};
218 219
219enum no_fbc_reason { 220enum no_fbc_reason {
@@ -1237,7 +1238,7 @@ static inline void i915_write(struct drm_i915_private *dev_priv, u32 reg,
1237#define IS_GEN5(dev) (INTEL_INFO(dev)->gen == 5) 1238#define IS_GEN5(dev) (INTEL_INFO(dev)->gen == 5)
1238#define IS_GEN6(dev) (INTEL_INFO(dev)->gen == 6) 1239#define IS_GEN6(dev) (INTEL_INFO(dev)->gen == 6)
1239 1240
1240#define HAS_BSD(dev) (IS_IRONLAKE(dev) || IS_G4X(dev)) 1241#define HAS_BSD(dev) (INTEL_INFO(dev)->has_bsd_ring)
1241#define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) 1242#define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
1242 1243
1243#define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay) 1244#define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay)