drm/i915: Probe for PCH chipset type

PCH is the new name for south bridge from Ironlake/Sandybridge,
which contains most of the display outputs except eDP. This one
adds a probe function to detect current PCH type, and method to
detect Cougarpoint PCH.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

1 files changed, 13 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 94fc9b65f4d7..6ffabab3bb60 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -221,6 +221,11 @@ enum no_fbc_reason {
         FBC_NOT_TILED, /* buffer not tiled */
 };
 
+enum intel_pch {
+        PCH_IBX,        /* Ibexpeak PCH */
+        PCH_CPT,        /* Cougarpoint PCH */
+};
+
 typedef struct drm_i915_private {
         struct drm_device *dev;
 
@@ -331,6 +336,9 @@ typedef struct drm_i915_private {
         /* Display functions */
         struct drm_i915_display_funcs display;
 
+        /* PCH chipset type */
+        enum intel_pch pch_type;
+
         /* Register state */
         bool modeset_on_lid;
         u8 saveLBB;
@@ -992,6 +1000,8 @@ extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
 extern void i8xx_disable_fbc(struct drm_device *dev);
 extern void g4x_disable_fbc(struct drm_device *dev);
 
+extern void intel_detect_pch (struct drm_device *dev);
+
 /**
  * Lock test for when it's just for synchronization of ring access.
  *
@@ -1137,6 +1147,9 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define HAS_PCH_SPLIT(dev) (IS_IRONLAKE(dev) || \
                             IS_GEN6(dev))
 
+#define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)
+#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
+
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
 
 #endif