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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-15 11:17:22 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-01-20 07:11:16 -0500
commit1f83fee08d625f8d0130f9fe5ef7b17c2e022f3c (patch)
treef876ef636a0e99c2afd8d20db81789e50d259439 /drivers/gpu/drm/i915/i915_drv.h
parent308887aad14c4ecc3fc10a3c58ec42641c5e4423 (diff)
drm/i915: clear up wedged transitions
We have two important transitions of the wedged state in the current code: - 0 -> 1: This means a hang has been detected, and signals to everyone that they please get of any locks, so that the reset work item can do its job. - 1 -> 0: The reset handler has completed. Now the last transition mixes up two states: "Reset completed and successful" and "Reset failed". To distinguish these two we do some tricks with the reset completion, but I simply could not convince myself that this doesn't race under odd circumstances. Hence split this up, and add a new terminal state indicating that the hw is gone for good. Also add explicit #defines for both states, update comments. v2: Split out the reset handling bugfix for the throttle ioctl. v3: s/tmp/wedged/ sugested by Chris Wilson. Also fixup up a rebase error which prevented this patch from actually compiling. v4: To unify the wedged state with the reset counter, keep the reset-in-progress state just as a flag. The terminally-wedged state is now denoted with a big number. v5: Add a comment to the reset_counter special values explaining that WEDGED & RESET_IN_PROGRESS needs to be true for the code to be correct. v6: Fixup logic errors introduced with the wedged+reset_counter unification. Since WEDGED implies reset-in-progress (in a way we're terminally stuck in the dead-but-reset-not-completed state), we need ensure that we check for this everywhere. The specific bug was in wait_for_error, which would simply have timed out. v7: Extract an inline i915_reset_in_progress helper to make the code more readable. Also annote the reset-in-progress case with an unlikely, to help the compiler optimize the fastpath. Do the same for the terminally wedged case with i915_terminally_wedged. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h40
1 files changed, 38 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 62da6c7a4884..c84743bb6937 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -771,11 +771,37 @@ struct i915_gpu_error {
771 /* Protected by the above dev->gpu_error.lock. */ 771 /* Protected by the above dev->gpu_error.lock. */
772 struct drm_i915_error_state *first_error; 772 struct drm_i915_error_state *first_error;
773 struct work_struct work; 773 struct work_struct work;
774 struct completion completion;
775 774
776 unsigned long last_reset; 775 unsigned long last_reset;
777 776
778 atomic_t wedged; 777 /**
778 * State variable controlling the reset flow
779 *
780 * Upper bits are for the reset counter.
781 *
782 * Lowest bit controls the reset state machine: Set means a reset is in
783 * progress. This state will (presuming we don't have any bugs) decay
784 * into either unset (successful reset) or the special WEDGED value (hw
785 * terminally sour). All waiters on the reset_queue will be woken when
786 * that happens.
787 */
788 atomic_t reset_counter;
789
790 /**
791 * Special values/flags for reset_counter
792 *
793 * Note that the code relies on
794 * I915_WEDGED & I915_RESET_IN_PROGRESS_FLAG
795 * being true.
796 */
797#define I915_RESET_IN_PROGRESS_FLAG 1
798#define I915_WEDGED 0xffffffff
799
800 /**
801 * Waitqueue to signal when the reset has completed. Used by clients
802 * that wait for dev_priv->mm.wedged to settle.
803 */
804 wait_queue_head_t reset_queue;
779 805
780 /* For gpu hang simulation. */ 806 /* For gpu hang simulation. */
781 unsigned int stop_rings; 807 unsigned int stop_rings;
@@ -1543,6 +1569,16 @@ void i915_gem_retire_requests(struct drm_device *dev);
1543void i915_gem_retire_requests_ring(struct intel_ring_buffer *ring); 1569void i915_gem_retire_requests_ring(struct intel_ring_buffer *ring);
1544int __must_check i915_gem_check_wedge(struct i915_gpu_error *error, 1570int __must_check i915_gem_check_wedge(struct i915_gpu_error *error,
1545 bool interruptible); 1571 bool interruptible);
1572static inline bool i915_reset_in_progress(struct i915_gpu_error *error)
1573{
1574 return unlikely(atomic_read(&error->reset_counter)
1575 & I915_RESET_IN_PROGRESS_FLAG);
1576}
1577
1578static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
1579{
1580 return atomic_read(&error->reset_counter) == I915_WEDGED;
1581}
1546 1582
1547void i915_gem_reset(struct drm_device *dev); 1583void i915_gem_reset(struct drm_device *dev);
1548void i915_gem_clflush_object(struct drm_i915_gem_object *obj); 1584void i915_gem_clflush_object(struct drm_i915_gem_object *obj);