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authorDave Airlie <airlied@linux.ie>2008-12-30 05:31:46 -0500
committerDave Airlie <airlied@linux.ie>2009-01-16 03:45:06 -0500
commit71acb5eb8d95b371f4cdd88a47f3c83c870d1c8f (patch)
tree36c370582e69cd61f2f088c31808fc02c6c86f1a /drivers/gpu/drm/i915/i915_drv.h
parente285f3cd2c376d2336f9a383241a98266363c7d4 (diff)
drm/i915: add support for physical memory objects
This is an initial patch to do support for objects which needs physical contiguous main ram, cursors and overlay registers on older chipsets. These objects are bound on cursor bin, like pinning, and we copy the data to/from the backing store object into the real one on attach/detach. notes: possible over the top in attach/detach operations. no overlay support yet. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 563de18063fd..e13518252007 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -72,6 +72,18 @@ enum pipe {
72#define WATCH_INACTIVE 0 72#define WATCH_INACTIVE 0
73#define WATCH_PWRITE 0 73#define WATCH_PWRITE 0
74 74
75#define I915_GEM_PHYS_CURSOR_0 1
76#define I915_GEM_PHYS_CURSOR_1 2
77#define I915_GEM_PHYS_OVERLAY_REGS 3
78#define I915_MAX_PHYS_OBJECT (I915_GEM_PHYS_OVERLAY_REGS)
79
80struct drm_i915_gem_phys_object {
81 int id;
82 struct page **page_list;
83 drm_dma_handle_t *handle;
84 struct drm_gem_object *cur_obj;
85};
86
75typedef struct _drm_i915_ring_buffer { 87typedef struct _drm_i915_ring_buffer {
76 int tail_mask; 88 int tail_mask;
77 unsigned long Size; 89 unsigned long Size;
@@ -358,6 +370,9 @@ typedef struct drm_i915_private {
358 uint32_t bit_6_swizzle_x; 370 uint32_t bit_6_swizzle_x;
359 /** Bit 6 swizzling required for Y tiling */ 371 /** Bit 6 swizzling required for Y tiling */
360 uint32_t bit_6_swizzle_y; 372 uint32_t bit_6_swizzle_y;
373
374 /* storage for physical objects */
375 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
361 } mm; 376 } mm;
362} drm_i915_private_t; 377} drm_i915_private_t;
363 378
@@ -436,6 +451,9 @@ struct drm_i915_gem_object {
436 /** User space pin count and filp owning the pin */ 451 /** User space pin count and filp owning the pin */
437 uint32_t user_pin_count; 452 uint32_t user_pin_count;
438 struct drm_file *pin_filp; 453 struct drm_file *pin_filp;
454
455 /** for phy allocated objects */
456 struct drm_i915_gem_phys_object *phys_obj;
439}; 457};
440 458
441/** 459/**
@@ -598,6 +616,11 @@ int i915_gem_do_init(struct drm_device *dev, unsigned long start,
598int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf); 616int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
599int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, 617int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
600 int write); 618 int write);
619int i915_gem_attach_phys_object(struct drm_device *dev,
620 struct drm_gem_object *obj, int id);
621void i915_gem_detach_phys_object(struct drm_device *dev,
622 struct drm_gem_object *obj);
623void i915_gem_free_all_phys_object(struct drm_device *dev);
601 624
602/* i915_gem_tiling.c */ 625/* i915_gem_tiling.c */
603void i915_gem_detect_bit_6_swizzle(struct drm_device *dev); 626void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);