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authorDavid S. Miller <davem@davemloft.net>2009-08-12 20:44:53 -0400
committerDavid S. Miller <davem@davemloft.net>2009-08-12 20:44:53 -0400
commitaa11d958d1a6572eda08214d7c6a735804fe48a5 (patch)
treed025b05270ad1e010660d17eeadc6ac3c1abbd7d /drivers/gpu/drm/i915/i915_drv.h
parent07f6642ee9418e962e54cbc07471cfe2e559c568 (diff)
parent9799218ae36910af50f002a5db1802d576fffb43 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts: arch/microblaze/include/asm/socket.h
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h31
1 files changed, 28 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bb4c2d387b6c..7537f57d8a87 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -133,6 +133,22 @@ struct sdvo_device_mapping {
133 u8 initialized; 133 u8 initialized;
134}; 134};
135 135
136struct drm_i915_error_state {
137 u32 eir;
138 u32 pgtbl_er;
139 u32 pipeastat;
140 u32 pipebstat;
141 u32 ipeir;
142 u32 ipehr;
143 u32 instdone;
144 u32 acthd;
145 u32 instpm;
146 u32 instps;
147 u32 instdone1;
148 u32 seqno;
149 struct timeval time;
150};
151
136typedef struct drm_i915_private { 152typedef struct drm_i915_private {
137 struct drm_device *dev; 153 struct drm_device *dev;
138 154
@@ -203,12 +219,20 @@ typedef struct drm_i915_private {
203 unsigned int lvds_vbt:1; 219 unsigned int lvds_vbt:1;
204 unsigned int int_crt_support:1; 220 unsigned int int_crt_support:1;
205 unsigned int lvds_use_ssc:1; 221 unsigned int lvds_use_ssc:1;
222 unsigned int edp_support:1;
206 int lvds_ssc_freq; 223 int lvds_ssc_freq;
207 224
208 struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */ 225 struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */
209 int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */ 226 int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
210 int num_fence_regs; /* 8 on pre-965, 16 otherwise */ 227 int num_fence_regs; /* 8 on pre-965, 16 otherwise */
211 228
229 unsigned int fsb_freq, mem_freq;
230
231 spinlock_t error_lock;
232 struct drm_i915_error_state *first_error;
233 struct work_struct error_work;
234 struct workqueue_struct *wq;
235
212 /* Register state */ 236 /* Register state */
213 u8 saveLBB; 237 u8 saveLBB;
214 u32 saveDSPACNTR; 238 u32 saveDSPACNTR;
@@ -468,9 +492,6 @@ struct drm_i915_gem_object {
468 */ 492 */
469 int fence_reg; 493 int fence_reg;
470 494
471 /** Boolean whether this object has a valid gtt offset. */
472 int gtt_bound;
473
474 /** How many users have pinned this object in GTT space */ 495 /** How many users have pinned this object in GTT space */
475 int pin_count; 496 int pin_count;
476 497
@@ -655,6 +676,7 @@ void i915_gem_free_object(struct drm_gem_object *obj);
655int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment); 676int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
656void i915_gem_object_unpin(struct drm_gem_object *obj); 677void i915_gem_object_unpin(struct drm_gem_object *obj);
657int i915_gem_object_unbind(struct drm_gem_object *obj); 678int i915_gem_object_unbind(struct drm_gem_object *obj);
679void i915_gem_release_mmap(struct drm_gem_object *obj);
658void i915_gem_lastclose(struct drm_device *dev); 680void i915_gem_lastclose(struct drm_device *dev);
659uint32_t i915_get_gem_seqno(struct drm_device *dev); 681uint32_t i915_get_gem_seqno(struct drm_device *dev);
660int i915_gem_object_get_fence_reg(struct drm_gem_object *obj); 682int i915_gem_object_get_fence_reg(struct drm_gem_object *obj);
@@ -869,7 +891,10 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
869 IS_I915GM(dev))) 891 IS_I915GM(dev)))
870#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 892#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev))
871#define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 893#define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev))
894#define SUPPORTS_EDP(dev) (IS_IGDNG_M(dev))
872#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev)) 895#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
896/* dsparb controlled by hw only */
897#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev))
873 898
874#define PRIMARY_RINGBUFFER_SIZE (128*1024) 899#define PRIMARY_RINGBUFFER_SIZE (128*1024)
875 900