diff options
author | Dave Airlie <airlied@redhat.com> | 2013-07-18 21:56:14 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2013-07-18 22:12:21 -0400 |
commit | e13af9a8340685cfe25d0c9f708da7121e0f51dd (patch) | |
tree | 43511021ce5e60c03ee4c2c68c3dc9ffcdc3d399 /drivers/gpu/drm/i915/i915_drv.c | |
parent | ee114b97e67b2a572f94982567a21ac4ee17c133 (diff) | |
parent | 50b44a449ff1a19712ebc36ffccf9ac0a68033bf (diff) |
Merge tag 'drm-intel-next-2013-07-12' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
Highlights:
- follow-up refactoring after the shared dpll rework that landed in 3.11
- oddball prep cleanups from Ben for ppgtt
- encoder->get_config state tracking infrastructure from Jesse
- used by the experimental fastboot support from Jesse (disabled by
default)
- make the error state file official and add it to our sysfs interface
(Mika)
- drm_mm prep changes from Ben, prepares to embedd the drm_mm_node (which
will be used by the vma rework later on)
- interrupt handling rework, follow up cleanups to the VECS enabling, hpd
storm handling and fifo underrun reporting.
- Big pile of smaller cleanups, code improvements and related stuff.
* tag 'drm-intel-next-2013-07-12' of git://people.freedesktop.org/~danvet/drm-intel: (72 commits)
drm/i915: clear DPLL reg when disabling i9xx dplls
drm/i915: Fix up cpt pixel multiplier enable sequence
drm/i915: clean up vlv ->pre_pll_enable and pll enable sequence
drm/i915: move error state to own compilation unit
drm/i915: Don't attempt to read an unitialized stack value
drm/i915: Use for_each_pipe() when possible
drm/i915: don't enable PM_VEBOX_CS_ERROR_INTERRUPT
drm/i915: unify ring irq refcounts (again)
drm/i915: kill dev_priv->rps.lock
drm/i915: queue work outside spinlock in hsw_pm_irq_handler
drm/i915: streamline hsw_pm_irq_handler
drm/i915: irq handlers don't need interrupt-safe spinlocks
drm/i915: kill lpt pch transcoder->crtc mapping code for fifo underruns
drm/i915: improve GEN7_ERR_INT clearing for fifo underrun reporting
drm/i915: improve SERR_INT clearing for fifo underrun reporting
drm/i915: extract ibx_display_interrupt_update
drm/i915: remove unused members from drm_i915_private
drm/i915: don't frob mm.suspended when not using ums
drm/i915: Fix VLV DP RBR/HDMI/DAC PLL LPF coefficients
drm/i915: WARN if the bios reserved range is bigger than stolen size
...
Conflicts:
drivers/gpu/drm/i915/i915_gem.c
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 33 |
1 files changed, 21 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index f4af1ca0fb62..b07362f2675e 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -132,6 +132,11 @@ int i915_enable_ips __read_mostly = 1; | |||
132 | module_param_named(enable_ips, i915_enable_ips, int, 0600); | 132 | module_param_named(enable_ips, i915_enable_ips, int, 0600); |
133 | MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)"); | 133 | MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)"); |
134 | 134 | ||
135 | bool i915_fastboot __read_mostly = 0; | ||
136 | module_param_named(fastboot, i915_fastboot, bool, 0600); | ||
137 | MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time " | ||
138 | "(default: false)"); | ||
139 | |||
135 | static struct drm_driver driver; | 140 | static struct drm_driver driver; |
136 | extern int intel_agp_enabled; | 141 | extern int intel_agp_enabled; |
137 | 142 | ||
@@ -551,7 +556,11 @@ static int i915_drm_freeze(struct drm_device *dev) | |||
551 | 556 | ||
552 | /* If KMS is active, we do the leavevt stuff here */ | 557 | /* If KMS is active, we do the leavevt stuff here */ |
553 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { | 558 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
554 | int error = i915_gem_idle(dev); | 559 | int error; |
560 | |||
561 | mutex_lock(&dev->struct_mutex); | ||
562 | error = i915_gem_idle(dev); | ||
563 | mutex_unlock(&dev->struct_mutex); | ||
555 | if (error) { | 564 | if (error) { |
556 | dev_err(&dev->pdev->dev, | 565 | dev_err(&dev->pdev->dev, |
557 | "GEM idle failed, resume might fail\n"); | 566 | "GEM idle failed, resume might fail\n"); |
@@ -656,7 +665,6 @@ static int __i915_drm_thaw(struct drm_device *dev) | |||
656 | intel_init_pch_refclk(dev); | 665 | intel_init_pch_refclk(dev); |
657 | 666 | ||
658 | mutex_lock(&dev->struct_mutex); | 667 | mutex_lock(&dev->struct_mutex); |
659 | dev_priv->mm.suspended = 0; | ||
660 | 668 | ||
661 | error = i915_gem_init_hw(dev); | 669 | error = i915_gem_init_hw(dev); |
662 | mutex_unlock(&dev->struct_mutex); | 670 | mutex_unlock(&dev->struct_mutex); |
@@ -793,28 +801,29 @@ static int i965_reset_complete(struct drm_device *dev) | |||
793 | static int i965_do_reset(struct drm_device *dev) | 801 | static int i965_do_reset(struct drm_device *dev) |
794 | { | 802 | { |
795 | int ret; | 803 | int ret; |
796 | u8 gdrst; | ||
797 | 804 | ||
798 | /* | 805 | /* |
799 | * Set the domains we want to reset (GRDOM/bits 2 and 3) as | 806 | * Set the domains we want to reset (GRDOM/bits 2 and 3) as |
800 | * well as the reset bit (GR/bit 0). Setting the GR bit | 807 | * well as the reset bit (GR/bit 0). Setting the GR bit |
801 | * triggers the reset; when done, the hardware will clear it. | 808 | * triggers the reset; when done, the hardware will clear it. |
802 | */ | 809 | */ |
803 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); | ||
804 | pci_write_config_byte(dev->pdev, I965_GDRST, | 810 | pci_write_config_byte(dev->pdev, I965_GDRST, |
805 | gdrst | GRDOM_RENDER | | 811 | GRDOM_RENDER | GRDOM_RESET_ENABLE); |
806 | GRDOM_RESET_ENABLE); | ||
807 | ret = wait_for(i965_reset_complete(dev), 500); | 812 | ret = wait_for(i965_reset_complete(dev), 500); |
808 | if (ret) | 813 | if (ret) |
809 | return ret; | 814 | return ret; |
810 | 815 | ||
811 | /* We can't reset render&media without also resetting display ... */ | 816 | /* We can't reset render&media without also resetting display ... */ |
812 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); | ||
813 | pci_write_config_byte(dev->pdev, I965_GDRST, | 817 | pci_write_config_byte(dev->pdev, I965_GDRST, |
814 | gdrst | GRDOM_MEDIA | | 818 | GRDOM_MEDIA | GRDOM_RESET_ENABLE); |
815 | GRDOM_RESET_ENABLE); | ||
816 | 819 | ||
817 | return wait_for(i965_reset_complete(dev), 500); | 820 | ret = wait_for(i965_reset_complete(dev), 500); |
821 | if (ret) | ||
822 | return ret; | ||
823 | |||
824 | pci_write_config_byte(dev->pdev, I965_GDRST, 0); | ||
825 | |||
826 | return 0; | ||
818 | } | 827 | } |
819 | 828 | ||
820 | static int ironlake_do_reset(struct drm_device *dev) | 829 | static int ironlake_do_reset(struct drm_device *dev) |
@@ -955,11 +964,11 @@ int i915_reset(struct drm_device *dev) | |||
955 | * switched away). | 964 | * switched away). |
956 | */ | 965 | */ |
957 | if (drm_core_check_feature(dev, DRIVER_MODESET) || | 966 | if (drm_core_check_feature(dev, DRIVER_MODESET) || |
958 | !dev_priv->mm.suspended) { | 967 | !dev_priv->ums.mm_suspended) { |
959 | struct intel_ring_buffer *ring; | 968 | struct intel_ring_buffer *ring; |
960 | int i; | 969 | int i; |
961 | 970 | ||
962 | dev_priv->mm.suspended = 0; | 971 | dev_priv->ums.mm_suspended = 0; |
963 | 972 | ||
964 | i915_gem_init_swizzling(dev); | 973 | i915_gem_init_swizzling(dev); |
965 | 974 | ||