diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-27 09:17:45 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-05 13:46:19 -0400 |
commit | 5ccce180fe6d484454650d8b2a71fde22d311013 (patch) | |
tree | 1a2302c99ae0c2454ec912415ee4c738a0f1d52f /drivers/gpu/drm/i915/i915_drv.c | |
parent | d4b8bb2ac1254b98631909251f299f7789b5bed5 (diff) |
drm/i915: also reset the media engine on gen4/5
... we actually use it.
Unfortunately we can't reset both at the same time without also
resetting the display unit, so do render and media separately.
Also replace magic constants with proper #defines.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 28 |
1 files changed, 25 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 2ecfcc2ef408..45c9430cf629 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -712,6 +712,7 @@ static int i965_reset_complete(struct drm_device *dev) | |||
712 | 712 | ||
713 | static int i965_do_reset(struct drm_device *dev) | 713 | static int i965_do_reset(struct drm_device *dev) |
714 | { | 714 | { |
715 | int ret; | ||
715 | u8 gdrst; | 716 | u8 gdrst; |
716 | 717 | ||
717 | /* | 718 | /* |
@@ -721,7 +722,17 @@ static int i965_do_reset(struct drm_device *dev) | |||
721 | */ | 722 | */ |
722 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); | 723 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); |
723 | pci_write_config_byte(dev->pdev, I965_GDRST, | 724 | pci_write_config_byte(dev->pdev, I965_GDRST, |
724 | gdrst | GRDOM_RENDER | 0x1); | 725 | gdrst | GRDOM_RENDER | |
726 | GRDOM_RESET_ENABLE); | ||
727 | ret = wait_for(i965_reset_complete(dev), 500); | ||
728 | if (ret) | ||
729 | return ret; | ||
730 | |||
731 | /* We can't reset render&media without also resetting display ... */ | ||
732 | pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); | ||
733 | pci_write_config_byte(dev->pdev, I965_GDRST, | ||
734 | gdrst | GRDOM_MEDIA | | ||
735 | GRDOM_RESET_ENABLE); | ||
725 | 736 | ||
726 | return wait_for(i965_reset_complete(dev), 500); | 737 | return wait_for(i965_reset_complete(dev), 500); |
727 | } | 738 | } |
@@ -729,9 +740,20 @@ static int i965_do_reset(struct drm_device *dev) | |||
729 | static int ironlake_do_reset(struct drm_device *dev) | 740 | static int ironlake_do_reset(struct drm_device *dev) |
730 | { | 741 | { |
731 | struct drm_i915_private *dev_priv = dev->dev_private; | 742 | struct drm_i915_private *dev_priv = dev->dev_private; |
732 | u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); | 743 | u32 gdrst; |
744 | int ret; | ||
745 | |||
746 | gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); | ||
747 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, | ||
748 | gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE); | ||
749 | ret = wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); | ||
750 | if (ret) | ||
751 | return ret; | ||
752 | |||
753 | /* We can't reset render&media without also resetting display ... */ | ||
754 | gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR); | ||
733 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, | 755 | I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, |
734 | gdrst | GRDOM_RENDER | 0x1); | 756 | gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE); |
735 | return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); | 757 | return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500); |
736 | } | 758 | } |
737 | 759 | ||