diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-16 19:32:17 -0400 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-21 06:19:45 -0400 |
commit | a6c45cf013a57e32ddae43dd4ac911eb4a3919fd (patch) | |
tree | 21ce3ea9dcbeb815c92eb0a17377e5061b33151c /drivers/gpu/drm/i915/i915_drv.c | |
parent | 219adae138513bae20b256f1946b9cb3b75ca05c (diff) |
drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g
Avoid confusion between i965g meaning broadwater and the gen4+ chipset
families.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 84 |
1 files changed, 41 insertions, 43 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 13dca9da6507..87c6b5f81fea 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -61,97 +61,101 @@ extern int intel_agp_enabled; | |||
61 | .driver_data = (unsigned long) info } | 61 | .driver_data = (unsigned long) info } |
62 | 62 | ||
63 | static const struct intel_device_info intel_i830_info = { | 63 | static const struct intel_device_info intel_i830_info = { |
64 | .gen = 2, .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1, | 64 | .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, |
65 | .has_overlay = 1, .overlay_needs_physical = 1, | 65 | .has_overlay = 1, .overlay_needs_physical = 1, |
66 | }; | 66 | }; |
67 | 67 | ||
68 | static const struct intel_device_info intel_845g_info = { | 68 | static const struct intel_device_info intel_845g_info = { |
69 | .gen = 2, .is_i8xx = 1, | 69 | .gen = 2, |
70 | .has_overlay = 1, .overlay_needs_physical = 1, | 70 | .has_overlay = 1, .overlay_needs_physical = 1, |
71 | }; | 71 | }; |
72 | 72 | ||
73 | static const struct intel_device_info intel_i85x_info = { | 73 | static const struct intel_device_info intel_i85x_info = { |
74 | .gen = 2, .is_i8xx = 1, .is_i85x = 1, .is_mobile = 1, | 74 | .gen = 2, .is_i85x = 1, .is_mobile = 1, |
75 | .cursor_needs_physical = 1, | 75 | .cursor_needs_physical = 1, |
76 | .has_overlay = 1, .overlay_needs_physical = 1, | 76 | .has_overlay = 1, .overlay_needs_physical = 1, |
77 | }; | 77 | }; |
78 | 78 | ||
79 | static const struct intel_device_info intel_i865g_info = { | 79 | static const struct intel_device_info intel_i865g_info = { |
80 | .gen = 2, .is_i8xx = 1, | 80 | .gen = 2, |
81 | .has_overlay = 1, .overlay_needs_physical = 1, | 81 | .has_overlay = 1, .overlay_needs_physical = 1, |
82 | }; | 82 | }; |
83 | 83 | ||
84 | static const struct intel_device_info intel_i915g_info = { | 84 | static const struct intel_device_info intel_i915g_info = { |
85 | .gen = 3, .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1, | 85 | .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, |
86 | .has_overlay = 1, .overlay_needs_physical = 1, | 86 | .has_overlay = 1, .overlay_needs_physical = 1, |
87 | }; | 87 | }; |
88 | static const struct intel_device_info intel_i915gm_info = { | 88 | static const struct intel_device_info intel_i915gm_info = { |
89 | .gen = 3, .is_i9xx = 1, .is_mobile = 1, | 89 | .gen = 3, .is_mobile = 1, |
90 | .cursor_needs_physical = 1, | 90 | .cursor_needs_physical = 1, |
91 | .has_overlay = 1, .overlay_needs_physical = 1, | 91 | .has_overlay = 1, .overlay_needs_physical = 1, |
92 | .supports_tv = 1, | ||
92 | }; | 93 | }; |
93 | static const struct intel_device_info intel_i945g_info = { | 94 | static const struct intel_device_info intel_i945g_info = { |
94 | .gen = 3, .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1, | 95 | .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, |
95 | .has_overlay = 1, .overlay_needs_physical = 1, | 96 | .has_overlay = 1, .overlay_needs_physical = 1, |
96 | }; | 97 | }; |
97 | static const struct intel_device_info intel_i945gm_info = { | 98 | static const struct intel_device_info intel_i945gm_info = { |
98 | .gen = 3, .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, | 99 | .gen = 3, .is_i945gm = 1, .is_mobile = 1, |
99 | .has_hotplug = 1, .cursor_needs_physical = 1, | 100 | .has_hotplug = 1, .cursor_needs_physical = 1, |
100 | .has_overlay = 1, .overlay_needs_physical = 1, | 101 | .has_overlay = 1, .overlay_needs_physical = 1, |
102 | .supports_tv = 1, | ||
101 | }; | 103 | }; |
102 | 104 | ||
103 | static const struct intel_device_info intel_i965g_info = { | 105 | static const struct intel_device_info intel_i965g_info = { |
104 | .gen = 4, .is_broadwater = 1, .is_i965g = 1, .is_i9xx = 1, | 106 | .gen = 4, .is_broadwater = 1, |
105 | .has_hotplug = 1, | 107 | .has_hotplug = 1, |
106 | .has_overlay = 1, | 108 | .has_overlay = 1, |
107 | }; | 109 | }; |
108 | 110 | ||
109 | static const struct intel_device_info intel_i965gm_info = { | 111 | static const struct intel_device_info intel_i965gm_info = { |
110 | .gen = 4, .is_crestline = 1, .is_i965g = 1, .is_i965gm = 1, .is_i9xx = 1, | 112 | .gen = 4, .is_crestline = 1, |
111 | .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, | 113 | .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, |
112 | .has_overlay = 1, | 114 | .has_overlay = 1, |
115 | .supports_tv = 1, | ||
113 | }; | 116 | }; |
114 | 117 | ||
115 | static const struct intel_device_info intel_g33_info = { | 118 | static const struct intel_device_info intel_g33_info = { |
116 | .gen = 3, .is_g33 = 1, .is_i9xx = 1, | 119 | .gen = 3, .is_g33 = 1, |
117 | .need_gfx_hws = 1, .has_hotplug = 1, | 120 | .need_gfx_hws = 1, .has_hotplug = 1, |
118 | .has_overlay = 1, | 121 | .has_overlay = 1, |
119 | }; | 122 | }; |
120 | 123 | ||
121 | static const struct intel_device_info intel_g45_info = { | 124 | static const struct intel_device_info intel_g45_info = { |
122 | .gen = 4, .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1, | 125 | .gen = 4, .is_g4x = 1, .need_gfx_hws = 1, |
123 | .has_pipe_cxsr = 1, .has_hotplug = 1, | 126 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
124 | }; | 127 | }; |
125 | 128 | ||
126 | static const struct intel_device_info intel_gm45_info = { | 129 | static const struct intel_device_info intel_gm45_info = { |
127 | .gen = 4, .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, | 130 | .gen = 4, .is_g4x = 1, |
128 | .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, | 131 | .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, |
129 | .has_pipe_cxsr = 1, .has_hotplug = 1, | 132 | .has_pipe_cxsr = 1, .has_hotplug = 1, |
133 | .supports_tv = 1, | ||
130 | }; | 134 | }; |
131 | 135 | ||
132 | static const struct intel_device_info intel_pineview_info = { | 136 | static const struct intel_device_info intel_pineview_info = { |
133 | .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1, | 137 | .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, |
134 | .need_gfx_hws = 1, .has_hotplug = 1, | 138 | .need_gfx_hws = 1, .has_hotplug = 1, |
135 | .has_overlay = 1, | 139 | .has_overlay = 1, |
136 | }; | 140 | }; |
137 | 141 | ||
138 | static const struct intel_device_info intel_ironlake_d_info = { | 142 | static const struct intel_device_info intel_ironlake_d_info = { |
139 | .gen = 5, .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, | 143 | .gen = 5, .is_ironlake = 1, |
140 | .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1, | 144 | .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1, |
141 | }; | 145 | }; |
142 | 146 | ||
143 | static const struct intel_device_info intel_ironlake_m_info = { | 147 | static const struct intel_device_info intel_ironlake_m_info = { |
144 | .gen = 5, .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1, | 148 | .gen = 5, .is_ironlake = 1, .is_mobile = 1, |
145 | .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, | 149 | .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, |
146 | }; | 150 | }; |
147 | 151 | ||
148 | static const struct intel_device_info intel_sandybridge_d_info = { | 152 | static const struct intel_device_info intel_sandybridge_d_info = { |
149 | .gen = 6, .is_i965g = 1, .is_i9xx = 1, | 153 | .gen = 6, |
150 | .need_gfx_hws = 1, .has_hotplug = 1, | 154 | .need_gfx_hws = 1, .has_hotplug = 1, |
151 | }; | 155 | }; |
152 | 156 | ||
153 | static const struct intel_device_info intel_sandybridge_m_info = { | 157 | static const struct intel_device_info intel_sandybridge_m_info = { |
154 | .gen = 6, .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, | 158 | .gen = 6, .is_mobile = 1, |
155 | .need_gfx_hws = 1, .has_hotplug = 1, | 159 | .need_gfx_hws = 1, .has_hotplug = 1, |
156 | }; | 160 | }; |
157 | 161 | ||
@@ -359,33 +363,27 @@ int i965_reset(struct drm_device *dev, u8 flags) | |||
359 | if (need_display) | 363 | if (need_display) |
360 | i915_save_display(dev); | 364 | i915_save_display(dev); |
361 | 365 | ||
362 | if (IS_I965G(dev) || IS_G4X(dev)) { | 366 | /* |
363 | /* | 367 | * Set the domains we want to reset, then the reset bit (bit 0). |
364 | * Set the domains we want to reset, then the reset bit (bit 0). | 368 | * Clear the reset bit after a while and wait for hardware status |
365 | * Clear the reset bit after a while and wait for hardware status | 369 | * bit (bit 1) to be set |
366 | * bit (bit 1) to be set | 370 | */ |
367 | */ | 371 | pci_read_config_byte(dev->pdev, GDRST, &gdrst); |
372 | pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0)); | ||
373 | udelay(50); | ||
374 | pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe); | ||
375 | |||
376 | /* ...we don't want to loop forever though, 500ms should be plenty */ | ||
377 | timeout = jiffies + msecs_to_jiffies(500); | ||
378 | do { | ||
379 | udelay(100); | ||
368 | pci_read_config_byte(dev->pdev, GDRST, &gdrst); | 380 | pci_read_config_byte(dev->pdev, GDRST, &gdrst); |
369 | pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0)); | 381 | } while ((gdrst & 0x1) && time_after(timeout, jiffies)); |
370 | udelay(50); | 382 | |
371 | pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe); | 383 | if (gdrst & 0x1) { |
372 | 384 | WARN(true, "i915: Failed to reset chip\n"); | |
373 | /* ...we don't want to loop forever though, 500ms should be plenty */ | ||
374 | timeout = jiffies + msecs_to_jiffies(500); | ||
375 | do { | ||
376 | udelay(100); | ||
377 | pci_read_config_byte(dev->pdev, GDRST, &gdrst); | ||
378 | } while ((gdrst & 0x1) && time_after(timeout, jiffies)); | ||
379 | |||
380 | if (gdrst & 0x1) { | ||
381 | WARN(true, "i915: Failed to reset chip\n"); | ||
382 | mutex_unlock(&dev->struct_mutex); | ||
383 | return -EIO; | ||
384 | } | ||
385 | } else { | ||
386 | DRM_ERROR("Error occurred. Don't know how to reset this chip.\n"); | ||
387 | mutex_unlock(&dev->struct_mutex); | 385 | mutex_unlock(&dev->struct_mutex); |
388 | return -ENODEV; | 386 | return -EIO; |
389 | } | 387 | } |
390 | 388 | ||
391 | /* Ok, now get things going again... */ | 389 | /* Ok, now get things going again... */ |