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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-04-07 04:15:53 -0400
committerEric Anholt <eric@anholt.net>2010-04-12 12:23:39 -0400
commit3bad0781832e4e8c9a532f1169bfcd7257bcfd9e (patch)
treed1ab074ca4a3e6f30fa95473584507776d7ac435 /drivers/gpu/drm/i915/i915_dma.c
parent7da9f6cbf70656ed1c913a674b82b68e076c99f7 (diff)
drm/i915: Probe for PCH chipset type
PCH is the new name for south bridge from Ironlake/Sandybridge, which contains most of the display outputs except eDP. This one adds a probe function to detect current PCH type, and method to detect Cougarpoint PCH. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index a9f8589490cf..d2daff1f8291 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1710,6 +1710,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
1710 /* Start out suspended */ 1710 /* Start out suspended */
1711 dev_priv->mm.suspended = 1; 1711 dev_priv->mm.suspended = 1;
1712 1712
1713 intel_detect_pch(dev);
1714
1713 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 1715 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1714 ret = i915_load_modeset_init(dev, prealloc_start, 1716 ret = i915_load_modeset_init(dev, prealloc_start,
1715 prealloc_size, agp_size); 1717 prealloc_size, agp_size);