drm/i915: add fence register management to execbuf

Adds code to set up fence registers at execbuf time on pre-965 chips as
necessary.  Also fixes up a few bugs in the pre-965 tile register support
(get_order != ffs).  The number of fences available to the kernel defaults
to the hw limit minus 3 (for legacy X front/back/depth), but a new parameter
allows userspace to override that as needed.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>

1 files changed, 10 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 1e01e7847155..cc0adb428cee 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -731,6 +731,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
         case I915_PARAM_HAS_GEM:
                 value = dev_priv->has_gem;
                 break;
+        case I915_PARAM_NUM_FENCES_AVAIL:
+                value = dev_priv->num_fence_regs - dev_priv->fence_reg_start;
+                break;
         default:
                 DRM_ERROR("Unknown parameter %d\n", param->param);
                 return -EINVAL;
@@ -764,6 +767,13 @@ static int i915_setparam(struct drm_device *dev, void *data,
         case I915_SETPARAM_ALLOW_BATCHBUFFER:
                 dev_priv->allow_batchbuffer = param->value;
                 break;
+        case I915_SETPARAM_NUM_USED_FENCES:
+                if (param->value > dev_priv->num_fence_regs ||
+                    param->value < 0)
+                        return -EINVAL;
+                /* Userspace can use first N regs */
+                dev_priv->fence_reg_start = param->value;
+                break;
         default:
                 DRM_ERROR("unknown parameter %d\n", param->param);
                 return -EINVAL;