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authorYu Zhang <yu.c.zhang@linux.intel.com>2015-02-10 06:05:51 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-02-13 17:28:24 -0500
commite21fd552ff068da4bcb1a0108e2933db52685f2c (patch)
tree2a7fed6ae807d73ddc774f8535f3ee5e9397fae8 /drivers/gpu/drm/i915/i915_dma.c
parentbd49234b6aa37fd32069e506c6997171afd326be (diff)
drm/i915: Add the display switch logic for vGPU in i915 driver
Display switch logic is added to notify the host side that current vGPU have a valid surface to show. It does so by writing the display_ready field in PV INFO page, and then will be handled in the host side. This is useful to avoid trickiness when the VM's framebuffer is being accessed in the middle of VM modesetting, e.g. compositing the framebuffer in the host side. v2: - move the notification code outside the 'else' in load sequence - remove the notification code in intel_crtc_set_config() v4: - code rebase, no need to define another dev_priv - use #define instead of enum for display readiness Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com> Signed-off-by: Jike Song <jike.song@intel.com> Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 1a46787129e7..5804aa5f9df0 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -36,6 +36,7 @@
36#include "intel_drv.h" 36#include "intel_drv.h"
37#include <drm/i915_drm.h> 37#include <drm/i915_drm.h>
38#include "i915_drv.h" 38#include "i915_drv.h"
39#include "i915_vgpu.h"
39#include "i915_trace.h" 40#include "i915_trace.h"
40#include <linux/pci.h> 41#include <linux/pci.h>
41#include <linux/console.h> 42#include <linux/console.h>
@@ -842,6 +843,13 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
842 } 843 }
843 } 844 }
844 845
846 /*
847 * Notify a valid surface after modesetting,
848 * when running inside a VM.
849 */
850 if (intel_vgpu_active(dev))
851 I915_WRITE(vgtif_reg(display_ready), VGT_DRV_DISPLAY_READY);
852
845 i915_setup_sysfs(dev); 853 i915_setup_sysfs(dev);
846 854
847 if (INTEL_INFO(dev)->num_pipes) { 855 if (INTEL_INFO(dev)->num_pipes) {