drm/i915: Initialize panel timing registers if VBIOS did not

The time between start of the pixel clock and backlight enable is a basic
panel timing constraint.  If the Panel Power On/Off registers are found
to be 0, assume we are booting without VBIOS initialization and set these
registers to something reasonable.

Change-Id: Ibed6cc10d46bf52fd92e0beb25ae3525b5eef99d
Signed-off-by: Bryan Freed <bfreed@chromium.org>
[ickle: rearranged into a separate function to distinguish its role from
simply parsing the VBIOS tables.]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

1 files changed, 4 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 2caf43de8a6a..35d121c70a1f 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1235,7 +1235,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
          */
         dev_priv->allow_batchbuffer = 1;
 
-        ret = intel_init_bios(dev);
+        ret = intel_parse_bios(dev);
         if (ret)
                 DRM_INFO("failed to find VBIOS tables\n");
 
@@ -2001,6 +2001,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
         intel_setup_gmbus(dev);
         intel_opregion_setup(dev);
 
+        /* Make sure the bios did its job and set up vital registers */
+        intel_setup_bios(dev);
+
         i915_gem_load(dev);
 
         /* Init HWS */