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authorBrad Volkin <bradley.d.volkin@intel.com>2014-10-16 15:24:42 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-11-04 08:04:54 -0500
commit42c7156af94783ff42edba6a3b07a51d35552c60 (patch)
tree725cd1aebefa75a7b6a04100fd495fcbfe99e0d9 /drivers/gpu/drm/i915/i915_cmd_parser.c
parenta919db9015832d7e4140a38e20ddc1c305c95cb2 (diff)
drm/i915: Abort command parsing for chained batches
libva uses chained batch buffers in a way that the command parser can't generally handle. Fortunately, libva doesn't need to write registers from batch buffers in the way that mesa does, so this patch causes the driver to fall back to non-secure dispatch if the parser detects a chained batch buffer. Note: The 2nd hunk to munge the error code of the parser looks a bit superflous. At least until we have the batch copy code ready and can run the cmd parser in granting mode. But it isn't since we still need to let existing libva buffers pass (though not with elevated privs ofc!). Testcase: igt/gem_exec_parse/chained-batch Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com> [danvet: Add note - this confused me in review and Brad clarified things (after a few mails ...).] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_cmd_parser.c')
-rw-r--r--drivers/gpu/drm/i915/i915_cmd_parser.c18
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 86b3ae0934a7..ef38915075a1 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -138,6 +138,11 @@ static const struct drm_i915_cmd_descriptor common_cmds[] = {
138 .mask = MI_GLOBAL_GTT, 138 .mask = MI_GLOBAL_GTT,
139 .expected = 0, 139 .expected = 0,
140 }}, ), 140 }}, ),
141 /*
142 * MI_BATCH_BUFFER_START requires some special handling. It's not
143 * really a 'skip' action but it doesn't seem like it's worth adding
144 * a new action. See i915_parse_cmds().
145 */
141 CMD( MI_BATCH_BUFFER_START, SMI, !F, 0xFF, S ), 146 CMD( MI_BATCH_BUFFER_START, SMI, !F, 0xFF, S ),
142}; 147};
143 148
@@ -955,7 +960,8 @@ static bool check_cmd(const struct intel_engine_cs *ring,
955 * Parses the specified batch buffer looking for privilege violations as 960 * Parses the specified batch buffer looking for privilege violations as
956 * described in the overview. 961 * described in the overview.
957 * 962 *
958 * Return: non-zero if the parser finds violations or otherwise fails 963 * Return: non-zero if the parser finds violations or otherwise fails; -EACCES
964 * if the batch appears legal but should use hardware parsing
959 */ 965 */
960int i915_parse_cmds(struct intel_engine_cs *ring, 966int i915_parse_cmds(struct intel_engine_cs *ring,
961 struct drm_i915_gem_object *batch_obj, 967 struct drm_i915_gem_object *batch_obj,
@@ -1002,6 +1008,16 @@ int i915_parse_cmds(struct intel_engine_cs *ring,
1002 break; 1008 break;
1003 } 1009 }
1004 1010
1011 /*
1012 * If the batch buffer contains a chained batch, return an
1013 * error that tells the caller to abort and dispatch the
1014 * workload as a non-secure batch.
1015 */
1016 if (desc->cmd.value == MI_BATCH_BUFFER_START) {
1017 ret = -EACCES;
1018 break;
1019 }
1020
1005 if (desc->flags & CMD_DESC_FIXED) 1021 if (desc->flags & CMD_DESC_FIXED)
1006 length = desc->length.fixed; 1022 length = desc->length.fixed;
1007 else 1023 else