drm/i915: use GMBUS to manage i2c links

Use the GMBUS interface rather than direct bit banging to grab the EDID
over DDC (and for other forms of auxiliary communication with external
display controllers). The hope is that this method will be much faster
and more reliable than bit banging for fetching EDIDs from buggy monitors
or through switches, though we still preserve the bit banging as a
fallback in case GMBUS fails.

Based on an original patch by Jesse Barnes.

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

1 files changed, 4 insertions, 6 deletions

diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
index a2ec3f487202..a12ed9414cc7 100644
--- a/drivers/gpu/drm/i915/dvo_ivch.c
+++ b/drivers/gpu/drm/i915/dvo_ivch.c
@@ -167,7 +167,6 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
 {
         struct ivch_priv *priv = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
-        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         u8 out_buf[1];
         u8 in_buf[2];
 
@@ -193,7 +192,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
 
         out_buf[0] = addr;
 
-        if (i2c_transfer(&i2cbus->adapter, msgs, 3) == 3) {
+        if (i2c_transfer(adapter, msgs, 3) == 3) {
                 *data = (in_buf[1] << 8) | in_buf[0];
                 return true;
         };
@@ -201,7 +200,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
         if (!priv->quiet) {
                 DRM_DEBUG_KMS("Unable to read register 0x%02x from "
                                 "%s:%02x.\n",
-                          addr, i2cbus->adapter.name, dvo->slave_addr);
+                          addr, adapter->name, dvo->slave_addr);
         }
         return false;
 }
@@ -211,7 +210,6 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
 {
         struct ivch_priv *priv = dvo->dev_priv;
         struct i2c_adapter *adapter = dvo->i2c_bus;
-        struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
         u8 out_buf[3];
         struct i2c_msg msg = {
                 .addr = dvo->slave_addr,
@@ -224,12 +222,12 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
         out_buf[1] = data & 0xff;
         out_buf[2] = data >> 8;
 
-        if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1)
+        if (i2c_transfer(adapter, &msg, 1) == 1)
                 return true;
 
         if (!priv->quiet) {
                 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
-                          addr, i2cbus->adapter.name, dvo->slave_addr);
+                          addr, adapter->name, dvo->slave_addr);
         }
 
         return false;