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authorPatrik Jakobsson <patrik.r.jakobsson@gmail.com>2013-07-09 19:20:19 -0400
committerPatrik Jakobsson <patrik.r.jakobsson@gmail.com>2013-07-23 19:47:20 -0400
commitd1fa08f3bacb6fc9a7642c85a4fa8976a3f1afac (patch)
tree810999f20e1b058677595349388b950a77711341 /drivers/gpu/drm/gma500
parentad3c46eae3f51b34adea55e0625d255b21ec0a15 (diff)
drm/gma500: Make all chips use gma_wait_for_vblank
Also remove the duplicated oaktrail function. Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/gma500')
-rw-r--r--drivers/gpu/drm/gma500/cdv_intel_dp.c3
-rw-r--r--drivers/gpu/drm/gma500/mdfld_intel_display.c6
-rw-r--r--drivers/gpu/drm/gma500/oaktrail_crtc.c6
-rw-r--r--drivers/gpu/drm/gma500/oaktrail_hdmi.c12
-rw-r--r--drivers/gpu/drm/gma500/psb_intel_display.c16
-rw-r--r--drivers/gpu/drm/gma500/psb_intel_drv.h1
-rw-r--r--drivers/gpu/drm/gma500/psb_intel_sdvo.c2
7 files changed, 17 insertions, 29 deletions
diff --git a/drivers/gpu/drm/gma500/cdv_intel_dp.c b/drivers/gpu/drm/gma500/cdv_intel_dp.c
index 88d9ef6b5b4a..839ab83ff6ec 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
@@ -34,6 +34,7 @@
34#include "psb_drv.h" 34#include "psb_drv.h"
35#include "psb_intel_drv.h" 35#include "psb_intel_drv.h"
36#include "psb_intel_reg.h" 36#include "psb_intel_reg.h"
37#include "gma_display.h"
37#include <drm/drm_dp_helper.h> 38#include <drm/drm_dp_helper.h>
38 39
39#define _wait_for(COND, MS, W) ({ \ 40#define _wait_for(COND, MS, W) ({ \
@@ -1317,7 +1318,7 @@ cdv_intel_dp_start_link_train(struct psb_intel_encoder *encoder)
1317 /* Enable output, wait for it to become active */ 1318 /* Enable output, wait for it to become active */
1318 REG_WRITE(intel_dp->output_reg, reg); 1319 REG_WRITE(intel_dp->output_reg, reg);
1319 REG_READ(intel_dp->output_reg); 1320 REG_READ(intel_dp->output_reg);
1320 psb_intel_wait_for_vblank(dev); 1321 gma_wait_for_vblank(dev);
1321 1322
1322 DRM_DEBUG_KMS("Link config\n"); 1323 DRM_DEBUG_KMS("Link config\n");
1323 /* Write the link configuration data */ 1324 /* Write the link configuration data */
diff --git a/drivers/gpu/drm/gma500/mdfld_intel_display.c b/drivers/gpu/drm/gma500/mdfld_intel_display.c
index aa6528dae072..da83fddbc9a8 100644
--- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
@@ -65,7 +65,7 @@ void mdfldWaitForPipeDisable(struct drm_device *dev, int pipe)
65 } 65 }
66 66
67 /* FIXME JLIU7_PO */ 67 /* FIXME JLIU7_PO */
68 psb_intel_wait_for_vblank(dev); 68 gma_wait_for_vblank(dev);
69 return; 69 return;
70 70
71 /* Wait for for the pipe disable to take effect. */ 71 /* Wait for for the pipe disable to take effect. */
@@ -93,7 +93,7 @@ void mdfldWaitForPipeEnable(struct drm_device *dev, int pipe)
93 } 93 }
94 94
95 /* FIXME JLIU7_PO */ 95 /* FIXME JLIU7_PO */
96 psb_intel_wait_for_vblank(dev); 96 gma_wait_for_vblank(dev);
97 return; 97 return;
98 98
99 /* Wait for for the pipe enable to take effect. */ 99 /* Wait for for the pipe enable to take effect. */
@@ -1034,7 +1034,7 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
1034 1034
1035 /* Wait for for the pipe enable to take effect. */ 1035 /* Wait for for the pipe enable to take effect. */
1036 REG_WRITE(map->cntr, dev_priv->dspcntr[pipe]); 1036 REG_WRITE(map->cntr, dev_priv->dspcntr[pipe]);
1037 psb_intel_wait_for_vblank(dev); 1037 gma_wait_for_vblank(dev);
1038 1038
1039mrst_crtc_mode_set_exit: 1039mrst_crtc_mode_set_exit:
1040 1040
diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c b/drivers/gpu/drm/gma500/oaktrail_crtc.c
index 75567ee8a519..8af461f3a72d 100644
--- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
@@ -242,7 +242,7 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int mode)
242 REG_READ(map->conf); 242 REG_READ(map->conf);
243 } 243 }
244 /* Wait for for the pipe disable to take effect. */ 244 /* Wait for for the pipe disable to take effect. */
245 psb_intel_wait_for_vblank(dev); 245 gma_wait_for_vblank(dev);
246 246
247 temp = REG_READ(map->dpll); 247 temp = REG_READ(map->dpll);
248 if ((temp & DPLL_VCO_ENABLE) != 0) { 248 if ((temp & DPLL_VCO_ENABLE) != 0) {
@@ -484,10 +484,10 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,
484 484
485 REG_WRITE(map->conf, pipeconf); 485 REG_WRITE(map->conf, pipeconf);
486 REG_READ(map->conf); 486 REG_READ(map->conf);
487 psb_intel_wait_for_vblank(dev); 487 gma_wait_for_vblank(dev);
488 488
489 REG_WRITE(map->cntr, dspcntr); 489 REG_WRITE(map->cntr, dspcntr);
490 psb_intel_wait_for_vblank(dev); 490 gma_wait_for_vblank(dev);
491 491
492oaktrail_crtc_mode_set_exit: 492oaktrail_crtc_mode_set_exit:
493 gma_power_end(dev); 493 gma_power_end(dev);
diff --git a/drivers/gpu/drm/gma500/oaktrail_hdmi.c b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
index f036f1fc161e..d9013f70b019 100644
--- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c
+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
@@ -155,12 +155,6 @@ static void oaktrail_hdmi_audio_disable(struct drm_device *dev)
155 HDMI_READ(HDMI_HCR); 155 HDMI_READ(HDMI_HCR);
156} 156}
157 157
158static void wait_for_vblank(struct drm_device *dev)
159{
160 /* Wait for 20ms, i.e. one cycle at 50hz. */
161 mdelay(20);
162}
163
164static unsigned int htotal_calculate(struct drm_display_mode *mode) 158static unsigned int htotal_calculate(struct drm_display_mode *mode)
165{ 159{
166 u32 htotal, new_crtc_htotal; 160 u32 htotal, new_crtc_htotal;
@@ -372,10 +366,10 @@ int oaktrail_crtc_hdmi_mode_set(struct drm_crtc *crtc,
372 366
373 REG_WRITE(PCH_PIPEBCONF, pipeconf); 367 REG_WRITE(PCH_PIPEBCONF, pipeconf);
374 REG_READ(PCH_PIPEBCONF); 368 REG_READ(PCH_PIPEBCONF);
375 wait_for_vblank(dev); 369 gma_wait_for_vblank(dev);
376 370
377 REG_WRITE(dspcntr_reg, dspcntr); 371 REG_WRITE(dspcntr_reg, dspcntr);
378 wait_for_vblank(dev); 372 gma_wait_for_vblank(dev);
379 373
380 gma_power_end(dev); 374 gma_power_end(dev);
381 375
@@ -459,7 +453,7 @@ void oaktrail_crtc_hdmi_dpms(struct drm_crtc *crtc, int mode)
459 REG_READ(PCH_PIPEBCONF); 453 REG_READ(PCH_PIPEBCONF);
460 } 454 }
461 455
462 wait_for_vblank(dev); 456 gma_wait_for_vblank(dev);
463 457
464 /* Enable plane */ 458 /* Enable plane */
465 temp = REG_READ(DSPBCNTR); 459 temp = REG_READ(DSPBCNTR);
diff --git a/drivers/gpu/drm/gma500/psb_intel_display.c b/drivers/gpu/drm/gma500/psb_intel_display.c
index 89be7a3632ef..fa57864f210d 100644
--- a/drivers/gpu/drm/gma500/psb_intel_display.c
+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
@@ -82,12 +82,6 @@ static void psb_intel_clock(int refclk, struct gma_clock_t *clock)
82 clock->dot = clock->vco / clock->p; 82 clock->dot = clock->vco / clock->p;
83} 83}
84 84
85void psb_intel_wait_for_vblank(struct drm_device *dev)
86{
87 /* Wait for 20ms, i.e. one cycle at 50hz. */
88 mdelay(20);
89}
90
91static int psb_intel_pipe_set_base(struct drm_crtc *crtc, 85static int psb_intel_pipe_set_base(struct drm_crtc *crtc,
92 int x, int y, struct drm_framebuffer *old_fb) 86 int x, int y, struct drm_framebuffer *old_fb)
93{ 87{
@@ -244,7 +238,7 @@ static void psb_intel_crtc_dpms(struct drm_crtc *crtc, int mode)
244 } 238 }
245 239
246 /* Wait for vblank for the disable to take effect. */ 240 /* Wait for vblank for the disable to take effect. */
247 psb_intel_wait_for_vblank(dev); 241 gma_wait_for_vblank(dev);
248 242
249 temp = REG_READ(map->dpll); 243 temp = REG_READ(map->dpll);
250 if ((temp & DPLL_VCO_ENABLE) != 0) { 244 if ((temp & DPLL_VCO_ENABLE) != 0) {
@@ -516,14 +510,14 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,
516 REG_WRITE(map->conf, pipeconf); 510 REG_WRITE(map->conf, pipeconf);
517 REG_READ(map->conf); 511 REG_READ(map->conf);
518 512
519 psb_intel_wait_for_vblank(dev); 513 gma_wait_for_vblank(dev);
520 514
521 REG_WRITE(map->cntr, dspcntr); 515 REG_WRITE(map->cntr, dspcntr);
522 516
523 /* Flush the plane changes */ 517 /* Flush the plane changes */
524 crtc_funcs->mode_set_base(crtc, x, y, old_fb); 518 crtc_funcs->mode_set_base(crtc, x, y, old_fb);
525 519
526 psb_intel_wait_for_vblank(dev); 520 gma_wait_for_vblank(dev);
527 521
528 return 0; 522 return 0;
529} 523}
@@ -669,12 +663,12 @@ static void psb_intel_crtc_restore(struct drm_crtc *crtc)
669 REG_WRITE(map->base, crtc_state->saveDSPBASE); 663 REG_WRITE(map->base, crtc_state->saveDSPBASE);
670 REG_WRITE(map->conf, crtc_state->savePIPECONF); 664 REG_WRITE(map->conf, crtc_state->savePIPECONF);
671 665
672 psb_intel_wait_for_vblank(dev); 666 gma_wait_for_vblank(dev);
673 667
674 REG_WRITE(map->cntr, crtc_state->saveDSPCNTR); 668 REG_WRITE(map->cntr, crtc_state->saveDSPCNTR);
675 REG_WRITE(map->base, crtc_state->saveDSPBASE); 669 REG_WRITE(map->base, crtc_state->saveDSPBASE);
676 670
677 psb_intel_wait_for_vblank(dev); 671 gma_wait_for_vblank(dev);
678 672
679 paletteReg = map->palette; 673 paletteReg = map->palette;
680 for (i = 0; i < 256; ++i) 674 for (i = 0; i < 256; ++i)
diff --git a/drivers/gpu/drm/gma500/psb_intel_drv.h b/drivers/gpu/drm/gma500/psb_intel_drv.h
index bfe0408c1291..596850210a51 100644
--- a/drivers/gpu/drm/gma500/psb_intel_drv.h
+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
@@ -246,7 +246,6 @@ extern struct drm_encoder *psb_intel_best_encoder(struct drm_connector
246 246
247extern struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev, 247extern struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,
248 struct drm_crtc *crtc); 248 struct drm_crtc *crtc);
249extern void psb_intel_wait_for_vblank(struct drm_device *dev);
250extern int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, 249extern int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
251 struct drm_file *file_priv); 250 struct drm_file *file_priv);
252extern struct drm_crtc *psb_intel_get_crtc_from_pipe(struct drm_device *dev, 251extern struct drm_crtc *psb_intel_get_crtc_from_pipe(struct drm_device *dev,
diff --git a/drivers/gpu/drm/gma500/psb_intel_sdvo.c b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
index 19e36603b23b..e3d1078ecf09 100644
--- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
@@ -1121,7 +1121,7 @@ static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1121 if ((temp & SDVO_ENABLE) == 0) 1121 if ((temp & SDVO_ENABLE) == 0)
1122 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE); 1122 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
1123 for (i = 0; i < 2; i++) 1123 for (i = 0; i < 2; i++)
1124 psb_intel_wait_for_vblank(dev); 1124 gma_wait_for_vblank(dev);
1125 1125
1126 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2); 1126 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
1127 /* Warn if the device reported failure to sync. 1127 /* Warn if the device reported failure to sync.