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authorJerome Glisse <jglisse@redhat.com>2012-05-09 09:34:47 -0400
committerDave Airlie <airlied@redhat.com>2012-05-09 12:22:19 -0400
commit3b7a2b24ea2b703b3af595d0d4ee233ab0b36377 (patch)
tree0f8ccea66571d7ffa556dd55cf8717e429ed59cf /drivers/gpu/drm/gma500/gtt.h
parentbb635567291482a87e4cc46e6683419c1f365ddf (diff)
drm/radeon: rework fence handling, drop fence list v7
Using 64bits fence sequence we can directly compare sequence number to know if a fence is signaled or not. Thus the fence list became useless, so does the fence lock that mainly protected the fence list. Things like ring.ready are no longer behind a lock, this should be ok as ring.ready is initialized once and will only change when facing lockup. Worst case is that we return an -EBUSY just after a successfull GPU reset, or we go into wait state instead of returning -EBUSY (thus delaying reporting -EBUSY to fence wait caller). v2: Remove left over comment, force using writeback on cayman and newer, thus not having to suffer from possibly scratch reg exhaustion v3: Rebase on top of change to uint64 fence patch v4: Change DCE5 test to force write back on cayman and newer but also any APU such as PALM or SUMO family v5: Rebase on top of new uint64 fence patch v6: Just break if seq doesn't change any more. Use radeon_fence prefix for all function names. Even if it's now highly optimized, try avoiding polling to often. v7: We should never poll the last_seq from the hardware without waking the sleeping threads, otherwise we might lose events. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Christian König <deathsimple@vodafone.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/gma500/gtt.h')
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