diff options
author | Tobias Jakobi <tjakobi@math.uni-bielefeld.de> | 2015-04-27 17:10:15 -0400 |
---|---|---|
committer | Inki Dae <daeinki@gmail.com> | 2015-05-19 09:50:52 -0400 |
commit | fac8a5b25f5b7954ba510727caadbd9f7839a958 (patch) | |
tree | cba3a6ab7458c8e72d56188d73cb7fe40cdfdcbd /drivers/gpu/drm/exynos | |
parent | 5d878bdb51bd7915ba3def8b531238c67624aa58 (diff) |
drm/exynos: mixer: remove buffer count handling in vp_video_buffer()
The video processor (VP) supports four formats: NV12, NV21 and its
tiled variants. All these formats are bi-planar, so the buffer
count in vp_video_buffer() is always 2.
Also properly exit if we're called with an invalid (non-VP) pixelformat.
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos')
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_mixer.c | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index fbec750574e6..1e8ce9ee039b 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -382,7 +382,6 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) | |||
382 | struct mixer_resources *res = &ctx->mixer_res; | 382 | struct mixer_resources *res = &ctx->mixer_res; |
383 | unsigned long flags; | 383 | unsigned long flags; |
384 | struct exynos_drm_plane *plane; | 384 | struct exynos_drm_plane *plane; |
385 | unsigned int buf_num = 1; | ||
386 | dma_addr_t luma_addr[2], chroma_addr[2]; | 385 | dma_addr_t luma_addr[2], chroma_addr[2]; |
387 | bool tiled_mode = false; | 386 | bool tiled_mode = false; |
388 | bool crcb_mode = false; | 387 | bool crcb_mode = false; |
@@ -393,27 +392,15 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) | |||
393 | switch (plane->pixel_format) { | 392 | switch (plane->pixel_format) { |
394 | case DRM_FORMAT_NV12: | 393 | case DRM_FORMAT_NV12: |
395 | crcb_mode = false; | 394 | crcb_mode = false; |
396 | buf_num = 2; | ||
397 | break; | 395 | break; |
398 | /* TODO: single buffer format NV12, NV21 */ | ||
399 | default: | 396 | default: |
400 | /* ignore pixel format at disable time */ | ||
401 | if (!plane->dma_addr[0]) | ||
402 | break; | ||
403 | |||
404 | DRM_ERROR("pixel format for vp is wrong [%d].\n", | 397 | DRM_ERROR("pixel format for vp is wrong [%d].\n", |
405 | plane->pixel_format); | 398 | plane->pixel_format); |
406 | return; | 399 | return; |
407 | } | 400 | } |
408 | 401 | ||
409 | if (buf_num == 2) { | 402 | luma_addr[0] = plane->dma_addr[0]; |
410 | luma_addr[0] = plane->dma_addr[0]; | 403 | chroma_addr[0] = plane->dma_addr[1]; |
411 | chroma_addr[0] = plane->dma_addr[1]; | ||
412 | } else { | ||
413 | luma_addr[0] = plane->dma_addr[0]; | ||
414 | chroma_addr[0] = plane->dma_addr[0] | ||
415 | + (plane->pitch * plane->fb_height); | ||
416 | } | ||
417 | 404 | ||
418 | if (plane->scan_flag & DRM_MODE_FLAG_INTERLACE) { | 405 | if (plane->scan_flag & DRM_MODE_FLAG_INTERLACE) { |
419 | ctx->interlace = true; | 406 | ctx->interlace = true; |