diff options
author | Rhyland Klein <rklein@nvidia.com> | 2012-05-08 14:42:38 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2012-05-20 11:25:23 -0400 |
commit | 3f7e82759c692df473675ed06fb90b20f1f225c3 (patch) | |
tree | f8f120546e55def9cb88ff9a0b8e13d4b36bb342 /drivers/gpio | |
parent | 7ccfe9b1d58ef5cf8fdbd50b6ee2ae0e9aa9cb36 (diff) |
mfd: Commonize tps65910 regmap access through header
This change removes the read/write callback functions in favor of common
regmap accessors inside the header file. This change also makes use of
regmap_read/write for single register access which maps better onto what this
driver actually needs.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/gpio')
-rw-r--r-- | drivers/gpio/gpio-tps65910.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c index 7eef648a3351..bc155f2509ba 100644 --- a/drivers/gpio/gpio-tps65910.c +++ b/drivers/gpio/gpio-tps65910.c | |||
@@ -23,9 +23,9 @@ | |||
23 | static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset) | 23 | static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset) |
24 | { | 24 | { |
25 | struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); | 25 | struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); |
26 | uint8_t val; | 26 | unsigned int val; |
27 | 27 | ||
28 | tps65910->read(tps65910, TPS65910_GPIO0 + offset, 1, &val); | 28 | tps65910_reg_read(tps65910, TPS65910_GPIO0 + offset, &val); |
29 | 29 | ||
30 | if (val & GPIO_STS_MASK) | 30 | if (val & GPIO_STS_MASK) |
31 | return 1; | 31 | return 1; |
@@ -39,10 +39,10 @@ static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset, | |||
39 | struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); | 39 | struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); |
40 | 40 | ||
41 | if (value) | 41 | if (value) |
42 | tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset, | 42 | tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset, |
43 | GPIO_SET_MASK); | 43 | GPIO_SET_MASK); |
44 | else | 44 | else |
45 | tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset, | 45 | tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset, |
46 | GPIO_SET_MASK); | 46 | GPIO_SET_MASK); |
47 | } | 47 | } |
48 | 48 | ||
@@ -54,7 +54,7 @@ static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset, | |||
54 | /* Set the initial value */ | 54 | /* Set the initial value */ |
55 | tps65910_gpio_set(gc, offset, value); | 55 | tps65910_gpio_set(gc, offset, value); |
56 | 56 | ||
57 | return tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset, | 57 | return tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset, |
58 | GPIO_CFG_MASK); | 58 | GPIO_CFG_MASK); |
59 | } | 59 | } |
60 | 60 | ||
@@ -62,7 +62,7 @@ static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset) | |||
62 | { | 62 | { |
63 | struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); | 63 | struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); |
64 | 64 | ||
65 | return tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset, | 65 | return tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset, |
66 | GPIO_CFG_MASK); | 66 | GPIO_CFG_MASK); |
67 | } | 67 | } |
68 | 68 | ||
@@ -102,7 +102,7 @@ void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base) | |||
102 | int i; | 102 | int i; |
103 | for (i = 0; i < tps65910->gpio.ngpio; ++i) { | 103 | for (i = 0; i < tps65910->gpio.ngpio; ++i) { |
104 | if (board_data->en_gpio_sleep[i]) { | 104 | if (board_data->en_gpio_sleep[i]) { |
105 | ret = tps65910_set_bits(tps65910, | 105 | ret = tps65910_reg_set_bits(tps65910, |
106 | TPS65910_GPIO0 + i, GPIO_SLEEP_MASK); | 106 | TPS65910_GPIO0 + i, GPIO_SLEEP_MASK); |
107 | if (ret < 0) | 107 | if (ret < 0) |
108 | dev_warn(tps65910->dev, | 108 | dev_warn(tps65910->dev, |