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authorShawn Guo <shawn.guo@linaro.org>2011-07-06 12:37:41 -0400
committerGrant Likely <grant.likely@secretlab.ca>2011-07-08 14:38:12 -0400
commite7fc6ae7446710a487510d212137a43289bbe90e (patch)
tree6f040b47a383ed19afe48521f449dc0081fa47de /drivers/gpio
parentfb1492186276ba52d99b58121b8a9a87f20cc9f3 (diff)
gpio/mxc: get rid of the uses of cpu_is_mx()
The patch removes all the uses of cpu_is_mx(). Instead, it utilizes platform_device_id to distinguish the different gpio types, IMX1_GPIO on i.mx1, IMX21_GPIO on i.mx21 and i.mx27, IMX31_GPIO on all other i.mx SoCs. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-mxc.c125
1 files changed, 107 insertions, 18 deletions
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 71ba316854ca..3775dccef4ad 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -27,9 +27,29 @@
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/slab.h> 28#include <linux/slab.h>
29#include <linux/basic_mmio_gpio.h> 29#include <linux/basic_mmio_gpio.h>
30#include <mach/hardware.h>
31#include <asm-generic/bug.h> 30#include <asm-generic/bug.h>
32 31
32enum mxc_gpio_hwtype {
33 IMX1_GPIO, /* runs on i.mx1 */
34 IMX21_GPIO, /* runs on i.mx21 and i.mx27 */
35 IMX31_GPIO, /* runs on all other i.mx */
36};
37
38/* device type dependent stuff */
39struct mxc_gpio_hwdata {
40 unsigned dr_reg;
41 unsigned gdir_reg;
42 unsigned psr_reg;
43 unsigned icr1_reg;
44 unsigned icr2_reg;
45 unsigned imr_reg;
46 unsigned isr_reg;
47 unsigned low_level;
48 unsigned high_level;
49 unsigned rise_edge;
50 unsigned fall_edge;
51};
52
33struct mxc_gpio_port { 53struct mxc_gpio_port {
34 struct list_head node; 54 struct list_head node;
35 void __iomem *base; 55 void __iomem *base;
@@ -40,6 +60,66 @@ struct mxc_gpio_port {
40 u32 both_edges; 60 u32 both_edges;
41}; 61};
42 62
63static struct mxc_gpio_hwdata imx1_imx21_gpio_hwdata = {
64 .dr_reg = 0x1c,
65 .gdir_reg = 0x00,
66 .psr_reg = 0x24,
67 .icr1_reg = 0x28,
68 .icr2_reg = 0x2c,
69 .imr_reg = 0x30,
70 .isr_reg = 0x34,
71 .low_level = 0x03,
72 .high_level = 0x02,
73 .rise_edge = 0x00,
74 .fall_edge = 0x01,
75};
76
77static struct mxc_gpio_hwdata imx31_gpio_hwdata = {
78 .dr_reg = 0x00,
79 .gdir_reg = 0x04,
80 .psr_reg = 0x08,
81 .icr1_reg = 0x0c,
82 .icr2_reg = 0x10,
83 .imr_reg = 0x14,
84 .isr_reg = 0x18,
85 .low_level = 0x00,
86 .high_level = 0x01,
87 .rise_edge = 0x02,
88 .fall_edge = 0x03,
89};
90
91static enum mxc_gpio_hwtype mxc_gpio_hwtype;
92static struct mxc_gpio_hwdata *mxc_gpio_hwdata;
93
94#define GPIO_DR (mxc_gpio_hwdata->dr_reg)
95#define GPIO_GDIR (mxc_gpio_hwdata->gdir_reg)
96#define GPIO_PSR (mxc_gpio_hwdata->psr_reg)
97#define GPIO_ICR1 (mxc_gpio_hwdata->icr1_reg)
98#define GPIO_ICR2 (mxc_gpio_hwdata->icr2_reg)
99#define GPIO_IMR (mxc_gpio_hwdata->imr_reg)
100#define GPIO_ISR (mxc_gpio_hwdata->isr_reg)
101
102#define GPIO_INT_LOW_LEV (mxc_gpio_hwdata->low_level)
103#define GPIO_INT_HIGH_LEV (mxc_gpio_hwdata->high_level)
104#define GPIO_INT_RISE_EDGE (mxc_gpio_hwdata->rise_edge)
105#define GPIO_INT_FALL_EDGE (mxc_gpio_hwdata->fall_edge)
106#define GPIO_INT_NONE 0x4
107
108static struct platform_device_id mxc_gpio_devtype[] = {
109 {
110 .name = "imx1-gpio",
111 .driver_data = IMX1_GPIO,
112 }, {
113 .name = "imx21-gpio",
114 .driver_data = IMX21_GPIO,
115 }, {
116 .name = "imx31-gpio",
117 .driver_data = IMX31_GPIO,
118 }, {
119 /* sentinel */
120 }
121};
122
43/* 123/*
44 * MX2 has one interrupt *for all* gpio ports. The list is used 124 * MX2 has one interrupt *for all* gpio ports. The list is used
45 * to save the references to all ports, so that mx2_gpio_irq_handler 125 * to save the references to all ports, so that mx2_gpio_irq_handler
@@ -47,22 +127,6 @@ struct mxc_gpio_port {
47 */ 127 */
48static LIST_HEAD(mxc_gpio_ports); 128static LIST_HEAD(mxc_gpio_ports);
49 129
50#define cpu_is_mx1_mx2() (cpu_is_mx1() || cpu_is_mx2())
51
52#define GPIO_DR (cpu_is_mx1_mx2() ? 0x1c : 0x00)
53#define GPIO_GDIR (cpu_is_mx1_mx2() ? 0x00 : 0x04)
54#define GPIO_PSR (cpu_is_mx1_mx2() ? 0x24 : 0x08)
55#define GPIO_ICR1 (cpu_is_mx1_mx2() ? 0x28 : 0x0C)
56#define GPIO_ICR2 (cpu_is_mx1_mx2() ? 0x2C : 0x10)
57#define GPIO_IMR (cpu_is_mx1_mx2() ? 0x30 : 0x14)
58#define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18)
59
60#define GPIO_INT_LOW_LEV (cpu_is_mx1_mx2() ? 0x3 : 0x0)
61#define GPIO_INT_HIGH_LEV (cpu_is_mx1_mx2() ? 0x2 : 0x1)
62#define GPIO_INT_RISE_EDGE (cpu_is_mx1_mx2() ? 0x0 : 0x2)
63#define GPIO_INT_FALL_EDGE (cpu_is_mx1_mx2() ? 0x1 : 0x3)
64#define GPIO_INT_NONE 0x4
65
66/* Note: This driver assumes 32 GPIOs are handled in one register */ 130/* Note: This driver assumes 32 GPIOs are handled in one register */
67 131
68static int gpio_set_irq_type(struct irq_data *d, u32 type) 132static int gpio_set_irq_type(struct irq_data *d, u32 type)
@@ -236,12 +300,36 @@ static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port)
236 IRQ_NOREQUEST, 0); 300 IRQ_NOREQUEST, 0);
237} 301}
238 302
303static void __devinit mxc_gpio_get_hw(struct platform_device *pdev)
304{
305 enum mxc_gpio_hwtype hwtype = pdev->id_entry->driver_data;
306
307 if (mxc_gpio_hwtype) {
308 /*
309 * The driver works with a reasonable presupposition,
310 * that is all gpio ports must be the same type when
311 * running on one soc.
312 */
313 BUG_ON(mxc_gpio_hwtype != hwtype);
314 return;
315 }
316
317 if (hwtype == IMX31_GPIO)
318 mxc_gpio_hwdata = &imx31_gpio_hwdata;
319 else
320 mxc_gpio_hwdata = &imx1_imx21_gpio_hwdata;
321
322 mxc_gpio_hwtype = hwtype;
323}
324
239static int __devinit mxc_gpio_probe(struct platform_device *pdev) 325static int __devinit mxc_gpio_probe(struct platform_device *pdev)
240{ 326{
241 struct mxc_gpio_port *port; 327 struct mxc_gpio_port *port;
242 struct resource *iores; 328 struct resource *iores;
243 int err; 329 int err;
244 330
331 mxc_gpio_get_hw(pdev);
332
245 port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL); 333 port = kzalloc(sizeof(struct mxc_gpio_port), GFP_KERNEL);
246 if (!port) 334 if (!port)
247 return -ENOMEM; 335 return -ENOMEM;
@@ -280,7 +368,7 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
280 /* gpio-mxc can be a generic irq chip */ 368 /* gpio-mxc can be a generic irq chip */
281 mxc_gpio_init_gc(port); 369 mxc_gpio_init_gc(port);
282 370
283 if (cpu_is_mx2()) { 371 if (mxc_gpio_hwtype == IMX21_GPIO) {
284 /* setup one handler for all GPIO interrupts */ 372 /* setup one handler for all GPIO interrupts */
285 if (pdev->id == 0) 373 if (pdev->id == 0)
286 irq_set_chained_handler(port->irq, 374 irq_set_chained_handler(port->irq,
@@ -334,6 +422,7 @@ static struct platform_driver mxc_gpio_driver = {
334 .owner = THIS_MODULE, 422 .owner = THIS_MODULE,
335 }, 423 },
336 .probe = mxc_gpio_probe, 424 .probe = mxc_gpio_probe,
425 .id_table = mxc_gpio_devtype,
337}; 426};
338 427
339static int __init gpio_mxc_init(void) 428static int __init gpio_mxc_init(void)