gpio: gpio-sch.c: fix checkpatch error

Fix :
 gpio/gpio-sch.c:206: ERROR: switch and case should be at the same indent

Also remove blank lines

Signed-off-by: Laurent Navet <laurent.navet@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

1 files changed, 35 insertions, 39 deletions

diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c
index 7e7b52be6e29..1e4de16ceb41 100644
--- a/drivers/gpio/gpio-sch.c
+++ b/drivers/gpio/gpio-sch.c
@@ -221,45 +221,41 @@ static int sch_gpio_probe(struct platform_device *pdev)
         gpio_ba = res->start;
 
         switch (id) {
-                case PCI_DEVICE_ID_INTEL_SCH_LPC:
-                        sch_gpio_core.base = 0;
-                        sch_gpio_core.ngpio = 10;
-
-                        sch_gpio_resume.base = 10;
-                        sch_gpio_resume.ngpio = 4;
-
-                        /*
-                         * GPIO[6:0] enabled by default
-                         * GPIO7 is configured by the CMC as SLPIOVR
-                         * Enable GPIO[9:8] core powered gpios explicitly
-                         */
-                        outb(0x3, gpio_ba + CGEN + 1);
-                        /*
-                         * SUS_GPIO[2:0] enabled by default
-                         * Enable SUS_GPIO3 resume powered gpio explicitly
-                         */
-                        outb(0x8, gpio_ba + RGEN);
-                        break;
-
-                case PCI_DEVICE_ID_INTEL_ITC_LPC:
-                        sch_gpio_core.base = 0;
-                        sch_gpio_core.ngpio = 5;
-
-                        sch_gpio_resume.base = 5;
-                        sch_gpio_resume.ngpio = 9;
-                        break;
-
-                case PCI_DEVICE_ID_INTEL_CENTERTON_ILB:
-                        sch_gpio_core.base = 0;
-                        sch_gpio_core.ngpio = 21;
-
-                        sch_gpio_resume.base = 21;
-                        sch_gpio_resume.ngpio = 9;
-                        break;
-
-                default:
-                        err = -ENODEV;
-                        goto err_sch_gpio_core;
+        case PCI_DEVICE_ID_INTEL_SCH_LPC:
+                sch_gpio_core.base = 0;
+                sch_gpio_core.ngpio = 10;
+                sch_gpio_resume.base = 10;
+                sch_gpio_resume.ngpio = 4;
+                /*
+                 * GPIO[6:0] enabled by default
+                 * GPIO7 is configured by the CMC as SLPIOVR
+                 * Enable GPIO[9:8] core powered gpios explicitly
+                 */
+                outb(0x3, gpio_ba + CGEN + 1);
+                /*
+                 * SUS_GPIO[2:0] enabled by default
+                 * Enable SUS_GPIO3 resume powered gpio explicitly
+                 */
+                outb(0x8, gpio_ba + RGEN);
+                break;
+
+        case PCI_DEVICE_ID_INTEL_ITC_LPC:
+                sch_gpio_core.base = 0;
+                sch_gpio_core.ngpio = 5;
+                sch_gpio_resume.base = 5;
+                sch_gpio_resume.ngpio = 9;
+                break;
+
+        case PCI_DEVICE_ID_INTEL_CENTERTON_ILB:
+                sch_gpio_core.base = 0;
+                sch_gpio_core.ngpio = 21;
+                sch_gpio_resume.base = 21;
+                sch_gpio_resume.ngpio = 9;
+                break;
+
+        default:
+                err = -ENODEV;
+                goto err_sch_gpio_core;
         }
 
         sch_gpio_core.dev = &pdev->dev;